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TSC80C51-25ICD/883 Datasheet(PDF) 9 Page - TEMIC Semiconductors

Part No. TSC80C51-25ICD/883
Description  CMOS 0 to 44 MHz Single-Chip 8 Bit Microcontroller
Download  19 Pages
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Maker  TEMIC [TEMIC Semiconductors]
Homepage  http://www.temic.de
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TSC80C51-25ICD/883 Datasheet(HTML) 9 Page - TEMIC Semiconductors

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TSC80C31/80C51
Rev. E (14 Jan.97)
9
MATRA MHS
Electrical Characteristics
Absolute Maximum Ratings*
Ambiant Temperature Under Bias :
C = commercial
0
°C to 70°C
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
I = industrial
–40
°C to 85°C
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Storage Temperature
–65
°C to + 150°C
. . . . . . . . . . . . . . . . . . . . . . . .
Voltage on VCC to VSS
–0.5 V to + 7 V
. . . . . . . . . . . . . . . . . . . . . . . .
Voltage on Any Pin to VSS
–0.5 V to VCC + 0.5 V
. . . . . . . . . . . . . . . . . . .
Power Dissipation
1 W**
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
** This value is based on the maximum allowable die temperature and
the thermal resistance of the package
* Notice
Stresses at or above those listed under “ Absolute Maximum Ratings”
may cause permanent damage to the device. This is a stress rating only
and functional operation of the device at these or any other conditions
above those indicated in the operational sections of this specification is
not implied. Exposure to absolute maximum rating conditions may affect
device reliability.
DC Parameters
TA = 0
°C to 70°C ; VSS = 0 V ; VCC = 5 V ± 10 % ; F = 0 to 44 MHz
TA = –40
°C + 85°C ; VSS = 0 V ; VCC = 5 V ± 10 % ; F = 0 to 44 MHz
Symbol
Parameter
Min
Typ (3)
Max
Unit
Test Conditions
VIL
Input Low Voltage
– 0.5
0.2 Vcc – 0.1
V
VIH
Input High Voltage (Except XTAL and RST)
0.2 Vcc + 0.9
Vcc + 0.5
V
VIH1
Input High Voltage (for XTAL and RST)
0.7 Vcc
Vcc + 0.5
V
VOL
Output Low Voltage (Port 1, 2 and 3) (4)
0.3
0.45
1.0
V
V
V
IOL = 100
µA
IOL = 1.6 mA (2)
IOL = 3.5 mA
VOL1
Output Low Voltage (Port 0, ALE, PSEN) (4)
0.3
0.45
1.0
V
V
V
IOL = 200
µA
IOL = 3.2 mA (2)
IOL = 7.0 mA
VOH
Output High Voltage Port 1, 2, 3
Vcc – 0.3
V
IOH = – 10
µA
Vcc – 0.7
V
IOH = – 30
µA
Vcc – 1.5
V
IOH = – 60
µA
VCC = 5 V
± 10 %
VOH1
Output High Voltage (Port 0, ALE, PSEN)
Vcc – 0.3
V
IOH = – 200
µA
Vcc – 0.7
V
IOH = – 3.2 mA
Vcc – 1.5
V
IOH = – 7.0 mA
VCC = 5 V
± 10 %
IIL
Logical 0 Input Current (Ports 1, 2 and 3)
– 50
µA
Vin = 0.45 V
ILI
Input leakage Current
± 10
µA
0.45 < Vin < Vcc
ITL
Logical 1 to 0 Transition Current (Ports 1, 2 and 3)
– 650
µA
Vin = 2.0 V
IPD
Power Down Current
5
30
µA
Vcc = 2.0 V to 5.5 V (1)
RRST
RST Pulldown Resistor
50
90
200
K
W
CIO
Capacitance of I/O Buffer
10
pF
fc = 1 MHz, Ta = 25
_C
ICC
Power Supply Current
Freq = 1 MHz
Icc op
Icc idle
Freq = 6 MHz
Icc op
Icc idle
Freq
≥ 12 MHz Icc op max = 0.9 Freq (MHz) + 5
0.7
0.5
4.2
1.4
1.8
1
9
3.5
mA
mA
mA
mA
mA
Vcc = 5.5 V
Freq
≥ 12 MHz Icc op max = 0.9 Freq (MHz) + 5
Icc idle max = 0.3 Freq (MHz) + 1.7
Freq
≤ 20 MHz Icc op typ = 0.7 Freq (MHz)
Freq
≥ 20 MHz Icc op typ = 0.5 Freq (MHz) + 4
Freq
≤ 20 MHz Icc idle typ = 0.16 Freq (MHz) + 0.4
Freq
≥ 20 MHz Icc idle typ = 0.12 Freq (MHz) + 1.2
mA
mA
mA
mA
mA
mA


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