Electronic Components Datasheet Search
  English  ▼

Delete All
ON OFF
ALLDATASHEET.COM

X  

Preview PDF Download HTML

CD74HC10 Datasheet(PDF) 1 Page - Texas Instruments

Click here to check the latest version.
Part No. CD74HC10
Description  High Speed CMOS Logic Triple 3-Input NAND Gate
Download  6 Pages
Scroll/Zoom Zoom In 100% Zoom Out
Maker  TI [Texas Instruments]
Homepage  http://www.ti.com
Logo 

CD74HC10 Datasheet(HTML) 1 Page - Texas Instruments

   
Zoom Inzoom in Zoom Outzoom out
 1 / 6 page
background image
1
Data sheet acquired from Harris Semiconductor
SCHS128
Features
• Buffered Inputs
• Typical Propagation Delay: 8ns at VCC = 5V,
CL = 15pF, TA = 25
oC
• Fanout (Over Temperature Range)
- Standard Outputs . . . . . . . . . . . . . . . 10 LSTTL Loads
- Bus Driver Outputs . . . . . . . . . . . . . 15 LSTTL Loads
• Wide Operating Temperature Range . . . -55oC to 125oC
• Balanced Propagation Delay and Transition Times
• Significant Power Reduction Compared to LSTTL
Logic ICs
• HC Types
- 2V to 6V Operation
- High Noise Immunity: NIL = 30%, NIH = 30% of VCC
at VCC = 5V
• HCT Types
- 4.5V to 5.5V Operation
- Direct LSTTL Input Logic Compatibility,
VIL= 0.8V (Max), VIH = 2V (Min)
- CMOS Input Compatibility, Il ≤ 1µA at VOL, VOH
• Related Literature
- CD54HC10F3A and CD54HCT10F3A Military
Data Sheet, Document Number 3758
Description
The Harris CD74HC10, CD74HCT10, logic gates utilize
silicon gate CMOS technology to achieve operating speeds
similar to LSTTL gates with the low power consumption of
standard CMOS integrated circuits. All devices have the
ability to drive 10 LSTTL loads. The 74HCT logic family is
Pinout
CD74HC10, CD74HCT10
(PDIP, SOIC)
TOP VIEW
1A
1B
2A
2B
2C
2Y
GND
VCC
1C
1Y
3C
3B
3A
3Y
1
2
3
4
5
6
7
14
13
12
11
10
9
8
August 1997
CAUTION: These devices are sensitive to electrostatic discharge. Users should follow proper IC Handling Procedures.
Copyright
© Harris Corporation 1997
CD74HC10,
CD74HCT10
High Speed CMOS Logic
Triple 3-Input NAND Gate
File Number
1551.1
[ /Title
(CD74
HC10,
CD74
HCT10
)
/Sub-
ject
(High
Speed
CMOS
Logic
Triple
3-Input
NAND
Gate)
/Autho
r ()
/Key-
words
(High
Speed
CMOS
Logic
Triple
3-Input
NAND
Gate,
High
Speed
CMOS
Logic
Triple
3-Input
NAND
Gate,
Harris
Semi-


Html Pages

1  2  3  4  5  6 


Datasheet Download




Link URL




Privacy Policy
ALLDATASHEET.COM
Does ALLDATASHEET help your business so far?  [ DONATE ]  

About Alldatasheet   |   Advertisement   |   Datasheet Upload   |   Contact us   |   Privacy Policy   |   Alldatasheet API   |   Link Exchange   |   Manufacturer List
All Rights Reserved© Alldatasheet.com


Mirror Sites
English : Alldatasheet.com  |   English : Alldatasheet.net  |   Chinese : Alldatasheetcn.com  |   German : Alldatasheetde.com  |   Japanese : Alldatasheet.jp
Russian : Alldatasheetru.com  |   Korean : Alldatasheet.co.kr  |   Spanish : Alldatasheet.es  |   French : Alldatasheet.fr  |   Italian : Alldatasheetit.com
Portuguese : Alldatasheetpt.com  |   Polish : Alldatasheet.pl  |   Vietnamese : Alldatasheet.vn