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CD74HC02 Datasheet(PDF) 1 Page - Texas Instruments |
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CD74HC02 Datasheet(HTML) 1 Page - Texas Instruments |
1 / 6 page 1 Data sheet acquired from Harris Semiconductor SCHS125 Features • Buffered Inputs • Typical Propagation Delay: 7ns at VCC = 5V, CL = 15pF, TA = 25 oC • Fanout (Over Temperature Range) - Standard Outputs . . . . . . . . . . . . . . . 10 LSTTL Loads - Bus Driver Outputs . . . . . . . . . . . . . 15 LSTTL Loads • Wide Operating Temperature Range . . . -55oC to 125oC • Balanced Propagation Delay and Transition Times • Significant Power Reduction Compared to LSTTL Logic ICs • HC Types - 2V to 6V Operation - High Noise Immunity: NIL = 30%, NIH = 30% of VCC at VCC = 5V • HCT Types - 4.5V to 5.5V Operation - Direct LSTTL Input Logic Compatibility, VIL= 0.8V (Max), VIH = 2V (Min) - CMOS Input Compatibility, Il ≤ 1µA at VOL, VOH • Related Literature - CD54HC02F3A and CD54HCT02F3A Military Data Sheet, Document Number 3754 Description The Harris CD74HC02, CH74HCT02 logic gates utilize silicon-gate CMOS technology to achieve operating speeds similar to LSTTL gates with the low power consumption of standard CMOS integrated circuits. All devices have the ability to drive 10 LSTTL loads. The 74HCT logic family is Pinout CD74HC02, CD74HCT02 (PDIP, SOIC) TOP VIEW 1Y 1A 1B 2Y 2A 2B GND VCC 4Y 4B 4A 3Y 3B 3A 1 2 3 4 5 6 7 14 13 12 11 10 9 8 March 1998 CAUTION: These devices are sensitive to electrostatic discharge. Users should follow proper IC Handling Procedures. Copyright © Harris Corporation 1998 CD74HC02, CD74HCT02 High Speed CMOS Logic Quad Two-Input NOR Gate File Number 1647.1 [ /Title (CD74H C02, CD74H CT02) /Subject (High Speed CMOS Logic Quad Two- |
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