S25FL032P datasheet(52/64 Pages) SPANSION

Part #	S25FL032P

Description	32-Mbit CMOS 3.0 Volt Flash Memory with 104-MHz SPI (Serial Peripheral Interface) Multi I/O Bus

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Manufacturer	SPANSION [SPANSION]

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S25FL032P

S25FL032P_00_02 February 12, 2009

D a ta

Sheet

(Prel i m i nar y)

11. Power-up and Power-down

During power-up and power-down, certain conditions must be observed. CS# must follow the voltage applied

on VCC, and must not be driven low to select the device until VCC reaches the allowable values as follows

(see Figure 11.1 and Table 11.1 on page 53):

At power-up, VCC (min.) plus a period of tPU

At power-down, VSS

A pull-up resistor on Chip Select (CS#) typically meets proper power-up and power-down requirements.

No Write Registers, program, or erase command should be sent to the device until VCC rises to the VCC min.,

plus a delay of tPU. At power-up, the device is in standby mode (not Deep Power-Down mode) and the WEL

bit is reset (0).

Each device in the host system should have the VCC rail decoupled by a suitable capacitor close to the

package pins (this capacitor is generally of the order of 0.1 µF), as a precaution to stabilizing the VCC feed.

When VCC drops from the operating voltage to below the minimum VCC threshold at power-down, all

operations are disabled and the device does not respond to any commands. Note that data corruption may

result if a power-down occurs while a Write Registers, program, or erase operation is in progress.

Figure 11.1 Power-Up Timing Diagram

Figure 11.2 Power-down and Voltage Drop

Vcc

(max)

Vcc

(min)

Full Device Access

tPU

Time

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