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LV7744DX-125.0M-T500 Datasheet(PDF) 3 Page - Pletronics, Inc. |
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LV7744DX-125.0M-T500 Datasheet(HTML) 3 Page - Pletronics, Inc. |
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3 / 8 page  LV77D Series 1.8 V LVDS Clock Oscillators April 2007 www.pletronics.com 425-776-1880 3 Electrical Specification for 1.80V + _5% over the specified temperature range and the frequency range of 1 to 250 MHz Item Min Max Unit Condition Frequency Accuracy “45" -50 +50 ppm For all supply voltages, load changes, aging for 1 year, shock, vibration and temperatures “44" -25 +25 “20" -20 +20 Output Waveform LVDS Differential Output (V OD) 200 450 mVolts See load circuit R1 = 50 ohms *Output Offset Voltage (V OS) 0.81 1.38 Volts Differential Output Error (dV OS)-- 50 mVolts Output Symmetry 45 55 % Referenced to 50% of amplitude or crossing point Output T RISE and TFALL 300 700 pS > 80 MHz Vth is 20% and 80% of waveform 400 900 pS < 80 MHz Jitter - 0.6 pS RMS Measured from 12KHz to 20MHz from Fnominal - 2.8 Measured from 10Hz to 1MHz from Fnominal Vcc Supply Current - 35 mA Includes current of properly terminated device Enable/Disable Internal Pull-up 50 - Kohm To Vcc (equivalent resistance) V disable - 0.18 Volts Referenced to Ground V enable 1.54 - Volts Output leakage V OUT = VCC -20 +20 uA Pad 1 low, device disabled V OUT = 0V -20 +20 uA Enable - 10 nS Time for output to reach a logic state Disable time - 10 nS Time for output to reach a high Z state Start up time - 5 mS > 80 MHz Measured from the time Vcc = 2.2V - 3 mS < 80 MHz Operating Temperature Range -10 +70 oC Standard Temperature Range -40 +85 oC Extended Temperature Range “E” Option Storage Temperature Range -55 +125 oC Standby Current I CC 2 3 mA Pad 1 low, device disabled * Output Offset Voltage is within proper range of LVDS inputs Specifications with Pad 1 E/D open circuit |
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