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LTC3773EG-TRPBF Datasheet(PDF) 4 Page - Linear Technology |
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LTC3773EG-TRPBF Datasheet(HTML) 4 Page - Linear Technology |
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4 / 32 page  LTC3773 4 3773fb Note 1: Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. Exposure to any Absolute Maximum Rating condition for extended periods may affect device reliability and lifetime. Note 2: The LTC3773 is guaranteed to meet performance specifications from 0°C to 85°C. Specifications over the – 40°C to 85°C operating temperature range are assured by design, characterization and correlation with statistical process controls. TJ is calculated from the ambient temperature TA and power dissipation PD according to the following formula. LTC3773EG: TJ = TA + (PD x 95°C/W) LTC3773EUHF: TJ = TA + (PD x 34°C/W) Note 3: All currents into device pins are positive; all currents out of device pins are negative. All voltages are referenced to ground unless otherwise specified. Note 4: The IC is tested in a feedback loop that adjusts VFB to achieve a specified error amplifier output voltage (VITH). Note 5: Guaranteed by design, not subject to test. Note 6: Dynamic supply current is higher due to the gate charge being delivered at the switching frequency. See Applications Information. Note 7: RDS(ON) limit is guaranteed by design and/or correlation to static test. Note 8: The minimum on-time condition corresponds to an inductor peak-to-peak ripple current of ≥40% of IMAX (see minimum on-time considerations in the Applications Information section). (Note 3) The ● denotes the specifications which apply over the full operating temperature range, otherwise specifications are at TA = 25°C. VCC = VDR = VBOOST = VSDB = 5V, unless otherwise noted. ELECTRICAL CHARACTERISTICS SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS Power Good Output Indication VPGL PGOOD Voltage Output Low IPGOOD = 2mA 0.1 0.3 V IPGOOD PGOOD Output Leakage VPGOOD = 5V 1 μA VPGTHNEG VPGTHPOS PGOOD Trip Thresholds VFB Ramping Negative VFB Ramping Positive VFB with Respect to 0.6V Reference PGOOD Goes Low After VPGDLY Delay –7 7 –10 10 –13 13 % % VPGDLY PGOOD Delay 100 150 μs Oscillator and Phase-Locked Loop fNOM Nominal Frequency VPLLFLTR Open 360 400 440 kHz fLOW Low Frequency VPLLFLTR = 0V 190 220 250 kHz fHIGH High Frequency VPLLFLTR = 5V 510 560 630 kHz fPLLLOW PLLIN Minimum Input Frequency 160 200 kHz fPLLHIGH PLLIN Maximum Input Frequency 540 700 kHz VLO VFLOAT VHI PLLIN/FC, PHASEMD, PLLFLTR Logic Input Low Level Input Voltage Floating Voltage High Level Input Voltage 1.0 1.6 3.0 V V V VPLLIN PLLIN Synchronization Input Threshold 1 V IPLLFLTR Phase Detector Output Current Sinking Capability Sourcing Capability VPLLFLTR = 1.5V fPLLIN < fOSC fPLLIN > fOSC 25 –25 μA μA PRELPHS Controller 2 - Controller 1 Phase Controller 3 - Controller 1 Phase PHASEMD Floats or VPHASEMD = 0V 120 240 Deg Deg Controller 2 - Controller 1 Phase Controller 3 - Controller 1 Phase VPHASEMD = 5V 90 270 Deg Deg CLKOUT Controller 1 TG to CLKOUT Phase PHASEMD Floats VPHASEMD = 0V VPHASEMD = 5V 0 60 180 Deg Deg Deg |
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