LTC3773 datasheet(10/32 Pages) LINER

Part #	LTC3773

Description	Triple Output Synchronous 3-Phase DC/DC Controller with Up/Down Tracking

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Manufacturer	LINER [Linear Technology]

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LTC3773

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SENSE1+ (Pin 1/Pin 34): The (+) Input to the Channel 1

Differential Current Comparator. The ITH1 pin voltage and

controlled offsets between the SENSE1– and SENSE1+

pins in conjunction with RSENSE set the channel 1 current

trip threshold.

SENSE1– (Pin 2/Pin 35):

The (–) Input to the Channel 1

Differential Current Comparator.

SDB/SDB1, SDB2, SDB3 (Pin 3/Pins 36, 37, 38): Shut-

down, Active Low. For G package, SDB1, SDB2 and SDB3

are shorted at the SDB pin. The power up thresholds for

channel 1, 2 and 3 are set at 1.2V, 1.8V and 2.4V respec-

tively. By pulling the SDB1, SDB2 and SDB3 pins below

0.4V, the IC is put into low current shutdown mode (IVCCQ

<30μA). There is a 0.5μA pull-up current at each SDB pin.

An external capacitor can be added at this pin to provide

power up delay.

TRACK1 (Pin 4/Pin 1): Channel 1 Tracking Input. TRACK1

is used for tracking multiple LTC3773s. See the Startup

Tracking application. To disable this feature, ﬂoat this pin

or tie it to VCC. TRACK1 provides a 1μA pull-up current.

An external capacitor can be added at this pin to provide

soft-start. During startup or output short-circuit condition,

if the potential at TRACK1 is less than 0.54V, current limit

foldback is disabled. When channel 1 is powered down,

this pin will be pulled low.

VFB1 (Pin 5/Pin 2): Channel 1 Error Ampliﬁer Feedback

Input. This pin connects the error ampliﬁer input to an

external resistive divider from VOUT1.

ITH1 (Pin 6/Pin 3): Channel 1 Error Ampliﬁer Output and

Switching Regulator Compensation Point. The current

comparator’s threshold increases with this control volt-

age.

SGND (Pin 7/Pin 4): Signal Ground. This pin must be

routed separately under the IC to the PGND pin and then

to the main ground plane.

ITH2 (Pin 8/Pin 5): Channel 2 Error Ampliﬁer Output and

Switching Regulator Compensation Point. See ITH1.

ITH3 (Pin 9/Pin 6): Channel 3 Error Ampliﬁer Output and

Switching Regulator Compensation Point. See ITH1.

VFB2 (Pin 10/Pin 7): Channel 2 Error Ampliﬁer Feedback

Input. See VFB1.

VFB3 (Pin 11/Pin 8): Channel 3 Error Ampliﬁer Feedback

Input. See VFB1.

TRACK2 (Pin 12/Pin 9): Channel 2 Tracking Input. Tie the

TRACK2 pin to a resistive divider connected to the output

of channel 1 for either coincident or ratiometric output

tracking. See the Soft-Start/Tracking application. TRACK2

comes with a 1μA pull-up current. An external capacitor

can be added at this pin to provide soft-start. During

startup or output short-circuit condition, if the potential

at TRACK2 is less than 0.54V, current limit foldback is

disabled. When channel 2 is powered down, this pin will

be pulled low.

TRACK3 (Pin 13/Pin 10): Channel 3 Tracking Input. See

TRACK2.

SENSE2– (Pin 14/Pin 11): The (–) Input to the Channel 2

Differential Current Comparator. See SENSE1–.

SENSE2+ (Pin 15/Pin 12): The (+) Input to the Channel 2

Differential Current Comparator. See SENSE1+.

SENSE3– (Pin 16/Pin 13): The (–) Input to the Channel 3

Differential Current Comparator. See SENSE1–.

SENSE3+ (Pin 17/Pin 14): The (+) Input to the Channel 3

Differential Current Comparator. See SENSE1+.

VCC (Pin 18/Pin 15): Main Input Supply. All internal circuits

except the output drivers are powered from this pin. VCC

should be connected to a low noise 5V power supply and

should be bypassed to SGND with at least a 1μF capacitor

in close proximity to the LTC3773.

PLLFLTR (Pin 19/Pin 16): Phase-Locked Loop Lowpass

Filter. The phase-locked loop’s lowpass ﬁlter is tied to this

pin. Alternatively, when external frequency synchronizing

is not used, this pin can be forced low, left ﬂoating or tied

high to vary the frequency of the internal oscillator.

PIN FUNCTIONS (G/UHF)

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