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LTC3548-2 Datasheet(PDF) 9 Page - Linear Technology

Part # LTC3548-2
Description  Dual Synchronous, Fixed/Adjustable Output, 2.25MHz Step-Down DC/DC Regulator
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Manufacturer  LINER [Linear Technology]
Direct Link  http://www.linear.com
Logo LINER - Linear Technology

LTC3548-2 Datasheet(HTML) 9 Page - Linear Technology

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LTC3548-2
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35482fa
In surface mount applications, multiple capacitors may
have to be paralleled to meet the capacitance, ESR or RMS
current handling requirement of the application. Alumi-
num electrolytic, special polymer, ceramic and dry tantulum
capacitors are all available in surface mount packages. The
OS-CON semiconductor dielectric capacitor available from
Sanyo has the lowest ESR(size) product of any aluminum
electrolytic at a somewhat higher price. Special polymer
capacitors, such as Sanyo POSCAP, Panasonic Special
Polymer (SP), and Kemet A700, offer very low ESR, but
have a lower capacitance density than other types. Tanta-
lum capacitors have the highest capacitance density, but
they have a larger ESR and it is critical that the capacitors
are surge tested for use in switching power supplies. An
excellent choice is the AVX TPS series of surface mount
tantalums, available in case heights ranging from 2mm to
4mm. Aluminum electrolytic capacitors have a signifi-
cantly larger ESR, and are often used in extremely cost-
sensitive applications provided that consideration is given
to ripple current ratings and long term reliability. Ceramic
capacitors have the lowest ESR and cost, but also have the
lowest capacitance density, a high voltage and tempera-
ture coefficient, and exhibit audible piezoelectric effects.
In addition, the high Q of ceramic capacitors along with
trace inductance can lead to significant ringing.
In most cases, 0.1
µF to 1µF of ceramic capacitors should
also be placed close to the LTC3548-2 in parallel with the
main capacitors for high frequency decoupling.
Ceramic Input and Output Capacitors
Higher value, lower cost ceramic capacitors are now
becoming available in smaller case sizes. These are tempt-
ing for switching regulator use because of their very low
ESR. Unfortunately, the ESR is so low that it can cause
loop stability problems. Solid tantalum capacitor ESR
generates a loop “zero” at 5kHz to 50kHz that is instrumen-
tal in giving acceptable loop phase margin. Ceramic ca-
pacitors remain capacitive to beyond 300kHz and usually
resonate with their ESL before ESR becomes effective.
Also, ceramic caps are prone to temperature effects which
requires the designer to check loop stability over the
operating temperature range. To minimize their large
temperature and voltage coefficients, only X5R or X7R
series resistance (ESR) input capacitor sized for the maxi-
mum RMS current must be used. The maximum RMS
capacitor current is given by:
II
VV
V
V
RMS
MAX
OUT
IN
OUT
IN
(–
where the maximum average output current IMAX equals
the peak current minus half the peak-to-peak ripple cur-
rent, IMAX = ILIM – ∆IL/2.
This formula has a maximum at VIN = 2VOUT, where IRMS
= IOUT/2. This simple worst-case is commonly used to
design because even significant deviations do not offer
much relief. Note that capacitor manufacturer’s ripple
current ratings are often based on only 2000 hours life-
time. This makes it advisable to further derate the capaci-
tor, or choose a capacitor rated at a higher temperature
than required. Several capacitors may also be paralleled to
meet the size or height requirements of the design. An
additional 0.1
µF to 1µF ceramic capacitor is also recom-
mended on VIN for high frequency decoupling, when not
using an all ceramic capacitor solution.
Output Capacitor (COUT) Selection
The selection of COUT is driven by the required ESR to
minimize voltage ripple and load step transients. Typically,
once the ESR requirement is satisfied, the capacitance is
adequate for filtering. The output ripple (
∆VOUT) is deter-
mined by:
∆≈ ∆
+
⎝⎜
⎠⎟
V
I
ESR
fC
OUT
L
O
OUT
1
8•
where f = operating frequency, COUT = output capacitance
and
∆IL = ripple current in the inductor. The output ripple
is highest at maximum input voltage since
∆IL increases
with input voltage. With
∆IL = 0.3 • IOUT(MAX) the output
ripple will be less than 100mV at maximum VIN and
fO = 2.25MHz with:
ESRCOUT < 150mΩ
Once the ESR requirements for COUT have been met, the
RMS current rating generally far exceeds the IRIPPLE(P-P)
requirement, except for an all ceramic solution.
APPLICATIO S I FOR ATIO


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