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LTC3544 Datasheet(PDF) 4 Page - Linear Technology

Part # LTC3544
Description  Quad Synchronous Step-Down Regulator: 2.25MHz, 300mA, 200mA, 200mA, 100mA
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Manufacturer  LINER [Linear Technology]
Direct Link  http://www.linear.com
Logo LINER - Linear Technology

LTC3544 Datasheet(HTML) 4 Page - Linear Technology

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LTC3544
4
3544fa
2
μs/DIV
VOUT300
50mV/DIV
AC
COUPLED
IL
100mA/DIV
SW300
5V/DIV
3544 G04
VIN = 3.6V
VOUT = 1.8V
TA = 25°C
ILOAD = 20mA
Burst Mode Operation
300mA Channel
Burst Mode Operation
200mA, A-B Channels
Burst Mode Operation
100mA Channel
VREF vs Temperature at 2.25V,
3.6V, 5.5V
Switching Frequency vs Supply
Voltage and Temperature
Efficiency vs Load Current 300mA
Channel. All Other Channels at
50% Peak Current
TEMPERATURE (
°C)
–50
0.785
0.790
0.795
0.800
0805
0.810
0.815
0
50
100
3544 G01
VIN = 2.25V
VIN = 3.6V
VIN = 5.5V
CHANNEL 200A
ILOAD = 100mA
ALL CHANNELS OPERATING
SUPPLY VOLTAGE (V)
2
1.5
2.0
2.5
3.0
34
3544 G02
56
fOSC –40°C
fOSC 0°C
fOSC 25°C
fOSC 80°C
ILOAD CHANNEL 100 = 50mA
ALL CHANNELS OPERATING
LOAD CURRENT 300mA CHANNEL (A)
30
90
100
20
10
80
50
70
60
40
0.0001
0.01
0.1
1
3544B G03
0
0.001
VIN = 3.6V
TA = 25°C
VOUT100 = 1.2V
VOUT200A = 0.8V
VOUT200B = 1.5V
VOUT300 = 1.8V
ALL OTHER CHANNELS LOADED 50%
2
μs/DIV
VOUT200B
50mV/DIV
AC
COUPLED
IL
50mA/DIV
SW2B
5V/DIV
3544 G05
VIN = 3.6V
VOUT = 1.5V
TA = 25°C
ILOAD = 15mA
2
μs/DIV
VOUT100
50mV/DIV
AC
COUPLED
IL
50mA/DIV
SW100
5V/DIV
3544 G06
VIN = 3.6V
VOUT = 1.2V
TA = 25°C
ILOAD = 12mA
TYPICAL PERFORMANCE CHARACTERISTICS
Note 3: TJ is calculated from the ambient temperature TA and power
dissipation PD according to the following formula:
TJ = TA + (PD)(68°C/W).
Note 4: This IC includes overtemperature protection that is intended
to protect the device during momentary overload conditions. Junction
temperature will exceed 125°C when overtemperature is active. Continuous
operation above the specified maximum operating junction temperature
may impair device reliability.
Note 5: The LTC3544 is tested in a proprietary test mode that connects VFB
to the output of the error amplifier.
Note 6: Load regulation is inferred by measuring the regulation loop gain.
Note 7: The QFN switch on-resistance is guaranteed by correlation to wafer
level measurements.
Note 8: Guaranteed by long-term current density limitations.
ELECTRICAL CHARACTERISTICS


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