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LTC2954ITS8-2 Datasheet(PDF) 6 Page - Linear Technology

Part # LTC2954ITS8-2
Description  Push Button On/Off Controller with 關P Interrupt
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Manufacturer  LINER [Linear Technology]
Direct Link  http://www.linear.com
Logo LINER - Linear Technology

LTC2954ITS8-2 Datasheet(HTML) 6 Page - Linear Technology

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LTC2954
6
2954f
VIN (Pin 1/Pin 4): Power Supply Input: 2.7V to 26.4V.
PB (Pin 2/Pin 3): Push Button Input. Connecting PB to
ground through a momentary switch provides On/Off
control via the EN/EN and INT outputs. An internal 100k
pull-up resistor connects to an internal 1.9V bias voltage.
The rugged PB input withstands ±10kV ESD HBM and
can be pulled up to 26.4V externally without consuming
extra current.
ONT (Pin 3/Pin 2): Turn On Time Input. Placing an external
capacitor to ground determines the additional time (6.4
seconds/µF) the PB pin must be held low before the enable
output is asserted. Floating this pin results in a default turn
on debounce time of 32ms.
GND (Pin 4/Pin 1): Device Ground.
INT(Pin5/Pin8):OpenDrainInterruptOutput.Afterapush
button turn off event is detected (tDB,OFF), the LTC2954
interrupts the system (µP) by asserting the INT pin low.
The µP would perform power down and housekeeping
tasks and then assert the KILL pin low, thus releasing the
enable output. The INT pulse width is a minimum of 32ms
and stays low as long as PB is asserted. If PB is asserted
for longer than tPD,Min + tPDT, the INT and EN/EN outputs
are immediately released.
EN (LTC2954-1, Pin 6/Pin 7): Open Drain Enable Output.
Thispinisintendedtoenablesystempower.ENisasserted
high after a valid PB turn on event (tDB,ON + tONT). EN is
released low if: a) KILL is not driven high (by μP) within
512ms of the initial valid PB power turn-on event, b) KILL
is driven low during normal operation, c) PB is pressed
and held low (tPD,Min + tPDT) during normal operation. The
operating range for this low leakage pin is 0V to 26.4V.

EN (LTC2954-2, Pin 6/Pin 7): Open Drain Enable Bar
Output. This pin is intended to enable system power. EN is
asserted low after a valid PB turn-on event (tDB,ON + tONT).
ENreleaseshighif:a)KILLisnotdrivenhigh(byμP)within
512ms of the initial valid PB power turn-on event, b) KILL
is driven low during normal operation, c) PB is pressed
and held low (tPD, Min + tPDT) during normal operation.
The operating range of this pin is 0V to 26.4V.
PDT (Pin 7/Pin 6): Power Down Time Input. A capacitor
to ground determines the additional time (6.4 seconds/µF)
that the push button must be held low before immediately
releasing the EN/EN and INT outputs. Floating this pin
results in a push button power down time of 64ms.
KILL (Pin 8/Pin 5): Kill Input. Forcing KILL low releases the
enable output. During system turn on, this pin is blanked
by a 512ms internal timer (tKILL, ON BLANK) to allow the
system to pull KILL high. This pin has an accurate 0.6V
threshold and can be used as a voltage monitor input.
Exposed Pad (Pin 9 DFN Only): Exposed Pad may be left
open or connected to device ground.
(TSOT-23/DFN)
PI FU CTIO S


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