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LTC2919CDDB-3.3-PBF Datasheet(PDF) 11 Page - Linear Technology |
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LTC2919CDDB-3.3-PBF Datasheet(HTML) 11 Page - Linear Technology |
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11 / 16 page  LTC2919 11 2919f APPLICATIO S I FOR ATIO 4.425V ±75mV over temperature (i.e., 10% to 13% below 5V). The monitored system must thus operate reliably down to 4.35V or 13% below 5V over temperature. The above discussion is concerned only with the DC value of the monitored supply. Real supplies also have relatively high frequency variations from sources such as load transients, noise and pickup. The LTC2919 uses two techniques to combat spurious outputs toggling from high frequency variation. First, the timeout period helps prevent high frequency varia- tion whose frequency is above 1/ tRST from appearing at the RST output. Second, the propagation delay versus overdrive function filters short glitches before the OUT1, OUT2 toggling or RST pulling low. When an ADJ becomes invalid, the corresponding OUT and RST pin assert low. When the supply recovers past the valid threshold, the reset timer starts (assuming it is not disabled) and RST does not go high until it finishes. If the supply becomes invalid any time during the timeout period, the timer resets and starts fresh when the supply next becomes valid. To reduce sensitivity of short glitches from toggling the output pins, the comparator outputs go through a lowpass filter before triggering the output logic. Any transient at the input of a comparator needs to be of sufficient magnitude and duration to pass the filter before it can change the monitor state. The combination of the reset timeout and comparator filtering prevents spurious changes in the output state without sacrificing threshold accuracy. If further supply glitch immunity is needed, the user may place an external capacitor from the ADJ input to ground. The resultant RC lowpass filter with the resistor divider will further reject high frequency components of the supply, at the cost of slowing the monitor’s response to fault conditions. A common solution to the problem of spurious reset is to introduce hysteresis around the nominal threshold. However, this hysteresis degrades the effective accuracy of the monitor and increases the range over which the system must operate. The LTC2919 therefore does not have hysteresis, except in comparator mode (by tying TMR pin to VCC). If hysteresis is desired in other modes, it may be added externally. See 48V Telecom UV/OV with Hysteresis Applications on page 14 for an example. Selecting External Resistors In a typical positive supply monitoring application, the ADJx pin connects to a tap point on an external resistive divider between a positive voltage being monitored and ground, as shown in Figure 1. When monitoring a negative supply, the ADJx pin connects to a tap point on a resistive divider between the negative voltage being monitored and the buffered reference (REF), as shown in Figure 2. – + + – 0.5V 2919 F01 ADJx VMON RP2 RP1 – + + – 0.5V 2919 F02 ADJx REF VMON RN1 RN2 Figure 1. Setting Positive Supply Trip Point Figure 2. Setting Negative Supply Trip Point Normally the user will select a desired trip voltage based on their supply and acceptable tolerances, and a value of RN1 or RP1 based on current draw. Current used by the resistive divider will be approximately: I = 0.5V R P1 .OR = 0.5V R N1 |
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