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LTC2631AHTS8-LM8 Datasheet(PDF) 7 Page - Linear Technology

Part # LTC2631AHTS8-LM8
Description  Single 12-/10-/8-Bit I2C VOUT DACs with 10ppm/째C Reference
Download  28 Pages
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Manufacturer  LINER [Linear Technology]
Direct Link  http://www.linear.com
Logo LINER - Linear Technology

LTC2631AHTS8-LM8 Datasheet(HTML) 7 Page - Linear Technology

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LTC2631
7
2631fb
ELECTRICAL CHARACTERISTICS The l denotes the specifications which apply over the full operating
temperature range, otherwise specifications are at TA = 25°C. VCC = 2.7V to 5.5V, VOUT unloaded unless otherwise specified.
LTC2631-LM12/-LM10/-LM8/-LZ12/-LZ10/-LZ8, LTC2631A-LM12/-LZ12 (VFS = 2.5V)
SYMBOL
PARAMETER
CONDITIONS
MIN
TYP
MAX
UNITS
AC Performance
tS
Settling Time
VCC = 3V (Note 9)
±0.39% (±1LSB at 8-Bits)
±0.098% (±1LSB at 10-Bits)
±0.024% (±1LSB at 12-Bits)
3.2
3.8
4.1
μs
μs
μs
Voltage-Output Slew Rate
1
V/μs
Capacitance Load Driving
500
pF
Glitch Impulse
At Mid-Scale Transition
2.1
nV•s
Multiplying Bandwidth
External Reference
300
kHz
en
Output Voltage Noise Density
At f = 1kHz, External Reference
At f = 10kHz, External Reference
At f = 1kHz, Internal Reference
At f = 10kHz, Internal Reference
140
130
160
150
nV√Hz
nV√Hz
nV√Hz
nV√Hz
Output Voltage Noise
0.1Hz to 10Hz, External Reference
0.1Hz to 10Hz, Internal Reference
0.1Hz to 200kHz, External Reference
0.1Hz to 200kHz, Internal Reference,
CREF = 0.33μF
20
20
650
670
μVP-P
μVP-P
μVP-P
μVP-P
TIMING CHARACTERISTICS The l denotes the specifications which apply over the full operating temperature
range, otherwise specifications are at TA = 25°C. VCC = 2.7V to 5.5V. (See Figure 1) (Note 13).
LTC2631-LM12/-LM10/-LM8/-LZ12/-LZ10/-LZ8, LTC2631A-LM12/-LZ12 (VFS = 2.5V)
SYMBOL
PARAMETER
CONDITIONS
MIN
TYP
MAX
UNITS
fSCL
SCL Clock Frequency
l
0
400
kHz
tHD(STA)
Hold Time (Repeated) Start Condition
l
0.6
μs
tLOW
Low Period of the SCL Clock Pin
l
1.3
μs
tHIGH
High Period of the SCL Clock Pin
l
0.6
μs
tSU(STA)
Set-Up Time for a Repeated Start Condition
l
0.6
μs
tHD(DAT)
Data Hold Time
l
0
0.9
μs
tSU(DAT)
Data Set-Up Time
l
100
ns
tr
Rise Time of Both SDA and SCL Signals
(Note 12)
l 20 + 0.1CB
300
ns
tf
Fall Time of Both SDA and SCL Signals
(Note 12)
l 20 + 0.1CB
300
ns
tSU(STO)
Set-Up Time for Stop Condition
l
0.6
μs
tBUF
Bus Free Time Between a Stop and Start Condition
l
1.3
μs


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