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AME8755 Datasheet(PDF) 4 Page - AMETHERM Circuit Protection Thermistors |
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AME8755 Datasheet(HTML) 4 Page - AMETHERM Circuit Protection Thermistors |
4 / 14 page AME 4 High PSRR, Low Quiescent Current, 150mA Dual CMOS LDO AME8755 Rev. A.01 n Pin Description Pin Name Pin Description OUT1 LDO voltage regulator output pin. It should be decoupled with a 1 µF or greater value low ESR ceramic capacitor. IN Input voltage pin. It should be decoupled with 1 µF or greater capacitor. OUT2 LDO voltage regulator output pin. It should be decoupled with a 1 µF or greater value low ESR ceramic capacitor. EN2 Enable pin. When pulled low, the PMOS pass transistor turns off OUT2, current consuming less than 1 µA. GND Ground connection pin. EN1 Enable pin. When pulled low, the PMOS pass transistor turns off OUT1, current consuming less than 1 µA. |
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