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LTC2482 Datasheet(PDF) 23 Page - Linear Technology |
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LTC2482 Datasheet(HTML) 23 Page - Linear Technology |
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23 / 32 page  LTC2482 23 2482fb APPLICATIONS INFORMATION When using the internal oscillator, the LTC2482’s front-end switched-capacitor network is clocked at 123kHz corre- sponding to an 8.1μs sampling period. Thus, for settling errors of less than 1ppm, the driving source impedance should be chosen such that τ≤8.1μs/14=580ns.Whenan external oscillator of frequency fEOSC is used, the sampling period is 2.5/fEOSC and, for a settling error of less than 1ppm, τ ≤ 0.178/fEOSC. Automatic Differential Input Current Cancellation In applications where the sensor output impedance is low (up to 10kΩ with no external bypass capacitor or up to 500Ω with 0.001μF bypass), complete settling of the input occurs. In this case, no errors are introduced and direct digitization of the sensor is possible. For many applications, the sensor output impedance combined with external bypass capacitors produces RC time constants much greater than the 580ns required for 1ppm accuracy. For example, a 10kΩ bridge driving a 0.1μF bypass capacitor has a time constant an order of magnitude greater than the required maximum. Historically, settling issues were solved using buffers. These buffers led to increased noise, reduced DC performance (offset/drift), limited input/output swing (cannot digitize signals near ground or VCC), added system cost and increased power. The LTC2482 uses a proprietary switching algorithm that forces the average differential input current to zero indepen- dent of external settling errors. This allows accurate direct digitization of high impedance sensors without the need for buffers. Additional errors resulting from mismatched leakage currents must also be taken into account. The switching algorithm forces the average input current on the positive input (IIN+) to be equal to the average input current on the negative input (IIN–). Over the complete conversion cycle, the average differential input current (IIN+ – IIN–) is zero. While the differential input current is zero, the common mode input current (IIN+ + IIN–)/2 is proportional to the difference between the common mode input voltage (VINCM) and the common mode reference voltage (VREFCM). In applications where the input common mode voltage is equal to the reference common mode voltage, as in the case of a balance bridge type application, both the differential and common mode input current are zero. The accuracy of the converter is unaffected by settling errors. Mismatches in source impedances between IN+ and IN– also do not affect the accuracy. In applications where the input common mode voltage is constant but different from the reference common mode voltage, the differential input current remains zero while the common mode input current is proportional to the differ- ence between VINCM and VREFCM. For a reference common mode of 2.5V and an input common mode of 1.5V, the common mode input current is approximately 0.74μA. This common mode input current has no effect on the accuracy if the external source impedances tied to IN+ and IN– are matched. Mismatches in these source impedances lead to a fixed offset error but do not affect the linearity or full-scale reading. A 1% mismatch in 1k source resistances leads to a 1LSB shift (74μV) in offset voltage. In applications where the common mode input voltage varies as a function of input signal level (single-ended input, RTDs, half bridges, current sensors, etc.), the com- mon mode input current varies proportionally with input voltage. For the case of balanced input impedances, the common mode input current effects are rejected by the large CMRR of the LTC2482 leading to little degradation in accuracy. Mismatches in source impedances lead to gain errors proportional to the difference between the common mode input voltage and the common mode ref- erence voltage. 1% mismatches in 1k source resistances lead to gain worst-case gain errors on the order of 1LSB (for 1V differences in reference and input common mode voltage). Table 5 summarizes the effects of mismatched source impedance and differences in reference/input common mode voltages. Table 5. Suggested Input Configuration for LTC2482 BALANCED INPUT RESISTANCES UNBALANCED INPUT RESISTANCES Constant VIN(CM) – VREF(CM) CIN > 1nF at Both IN+ and IN–. Can Take Large Source Resistance with Negligible Error CIN > 1nF at Both IN+ and IN–. Can Take Large Source Resistance. Unbalanced Resistance Results in an Offset Which Can be Calibrated Varying VIN(CM) – VREF(CM) CIN > 1nF at Both IN+ and IN–. Can Take Large Source Resistance with Negligible Error Minimize IN+ and IN– Capacitors and Avoid Large Source Impedance (<5k Recommended) |
Similar Part No. - LTC2482 |
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Similar Description - LTC2482 |
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