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LTC2482 Datasheet(PDF) 14 Page - Linear Technology |
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LTC2482 Datasheet(HTML) 14 Page - Linear Technology |
14 / 32 page LTC2482 14 2482fb APPLICATIONS INFORMATION Conversion Clock A major advantage the delta-sigma converter offers over conventional type converters is an on-chip digital filter (commonly implemented as a SINC or Comb filter). For high resolution, low frequency applications, this filter is typically designed to reject line frequencies of 50Hz or 60Hz plus their harmonics. The filter rejection performance is directly related to the accuracy of the converter system clock. The LTC2482 incorporates a highly accurate on-chip oscillator. This eliminates the need for external frequency setting components such as crystals or oscillators. Frequency Rejection Selection (fO) The LTC2482 internal oscillator provides better than 87dB normal mode rejection at the line frequency and all its harmonics (up to the 255th) for the frequency range 48Hz to 62.4Hz. When a fundamental rejection frequency different from 50Hz/60Hz is required, when more than 87dB rejection is needed for 50Hz/60Hz, or when the converter must be syn- chronized with an outside source, the LTC2482 can operate with an external conversion clock. The converter automati- cally detects the presence of an external clock signal at the fO pin and turns off the internal oscillator. The frequency fEOSC of the external signal must be at least 10kHz to be detected. The external clock signal duty cycle is not significant as long as the minimum and maximum specifications for the high and low periods tHEO and tLEO are observed. While operating with an external conversion clock of a frequency fEOSC, the LTC2482 provides better than 110dB normal mode rejection in a frequency range of fEOSC/5120 ±4% and its harmonics. The normal mode rejection as a function of the input frequency deviation from fEOSC/5120 is shown in Figure 3. DIFFERENTIAL INPUT SIGNAL FREQUENCY DEVIATION FROM NOTCH FREQUENCY fEOSC/5120(%) –12 –8 –4 0 4 8 12 2480 F03 –80 –85 –90 –95 –100 –105 –110 –115 –120 –125 –130 –135 –140 Figure 3. LTC2482 Normal Mode Rejection When Using an External Oscillator Whenever an external clock is not present at the fO pin, the converter automatically activates its internal oscilla- tor and enters the internal conversion clock mode. The LTC2482 operation will not be disturbed if the change of conversion clock source occurs during the sleep state or during the data output state while the converter uses an external serial clock. If the change occurs during the conversion state, the result of the conversion in progress may be outside specifications but the following conver- sions will not be affected. If the change occurs during the data output state and the converter is in the Internal SCK mode, the serial clock duty cycle may be affected but the serial data stream will remain valid. Table 3 summarizes the duration of each state and the achievable output data rate as a function of fO. Table 3. LTC2482 State Duration STATE OPERATING MODE DURATION CONVERT Internal Oscillator 50Hz/60Hz Rejection 147ms, Output Data Rate ≤ 6.8 Readings/s External Oscillator fO = External Oscillator with Frequency fEOSC kHz (fEOSC/5120 Rejection) 41036/fEOSCs, Output Data Rate ≤ fEOSC/41036 Readings/s SLEEP As Long As CS = High, After a Conversion is Complete DATA OUTPUT Internal Serial Clock fO = Low/High (Internal Oscillator) As Long As CS = Low But Not Longer Than 0.62ms (24 SCK Cycles) fO = External Oscillator with Frequency fEOSC kHz As Long As CS = Low But Not Longer Than 192/fEOSCms (24 SCK Cycles) External Serial Clock with Frequency fSCK kHz As Long As CS = Low But Not Longer Than 24/fSCKms (24 SCK Cycles) |
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