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LTC2433-1 Datasheet(PDF) 23 Page - Linear Technology |
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LTC2433-1 Datasheet(HTML) 23 Page - Linear Technology |
23 / 28 page LTC2433-1 23 24331fa Larger values of reference capacitors (CREF > 0.01µF) may be required as reference filters in certain configurations. Such capacitors will average the reference sampling charge and the external source resistance will see a quasi con- stant reference differential impedance. When FO = LOW (internal oscillator and 50Hz/60Hz notch), the typical differential reference resistance is 4.2M Ω which will gen- erate a gain error of approximately 1LSB full scale for each 120 Ω of source resistance driving REF+ or REF–. When FO is driven by an external oscillator with a frequency fEOSC (external conversion clock operation), the typical differen- tial reference resistance is 0.60 • 1012/fEOSCΩ and each ohm of source resistance drving REF+ or REF– will result in 5.1 • 10–8 • fEOSCLSB gain error at full scale. The effect Figure 19. +FS Error vs RSOURCE at REF+ or REF– (Small CIN) Figure 20. –FS Error vs RSOURCE at REF+ or REF– (Small CIN) Figure 21. +FS Error vs RSOURCE at REF+ and REF– (Large CREF) Figure 22. –FS Error vs RSOURCE at REF+ and REF– (Large CREF) RSOURCE (Ω) 1 10 100 1k 10k 100k 24331 F19 0 –1 –2 –3 VCC = 5V REF+ = 5V REF – = GND IN+ = 3.75V IN – = 1.25V FO = GND TA = 25°C CREF = 0.01µF CREF = 0.001µF CREF = 100pF CREF = 0pF RSOURCE (Ω) 1 10 100 1k 10k 100k 24331 F20 3 2 1 0 CREF = 0.01µF CREF = 0.001µF CREF = 100pF CREF = 0pF VCC = 5V REF+ = 5V REF – = GND IN+ = 1.25V IN – = 3.75V FO = GND TA = 25°C RSOURCE (Ω) 0 0 –5 –10 800 24331 F21 200 400 600 1000 700 100 300 500 900 VCC = 5V REF+ = 5V REF– = GND IN+ = 3.75V IN – = 1.25V FO = GND TA = 25°C CREF = 0.01µF CREF = 1µF CREF = 0.1µF CREF = 10µF RSOURCE (Ω) 0 10 5 0 800 24331 F22 200 400 600 1000 700 100 300 500 900 VCC = 5V REF+ = 5V REF– = GND IN+ = 1.25V IN – = 3.75V FO = GND TA = 25°C CREF = 0.01µF CREF = 1µF CREF = 0.1µF CREF = 10µF of the source resistance on the two reference pins is additive with respect to this gain error. The typical +FS and –FS errors for various combinations of source resistance seen by the REF+ and REF– pins and external capacitance CREF connected to these pins are shown in Figures 19, 20, 21 and 22. In addition to this gain error, the converter INL perfor- mance is degraded by the reference source impedance. When FO = LOW (internal oscillator and 50Hz/60Hz notch), every 1000 Ω of source resistance driving REF+ or REF– translates into about 1LSB additional INL error. When FO is driven by an external oscillator with a frequency fEOSC, every 1000 Ω of source resistance driving REF+ or REF– APPLICATIO S I FOR ATIO |
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