LTC2360/LTC2361/LTC2362

5

236012f

Note 1: Stresses beyond those listed under Absolute Maximum Ratings

may cause permanent damage to the device. Exposure to any Absolute

Maximum Rating condition for extended periods may affect device

reliability and lifetime.

Note 2: All voltage values are with respect to GND.

they will be clamped by internal diodes. These products can handle input

Note 5: Integral linearity is defined as the deviation of a code from a

straight line passing through the actual endpoints of the transfer curve.

The deviation is measured from the center of the quantization band.

SYMBOL

PARAMETER

CONDITIONS

LTC2360

LTC2361

LTC2362

UNITS

MIN

TYP

MAX

MIN

TYP

MAX

MIN

TYP

MAX

Maximum Sampling Frequency

(Notes 8, 9)

250

500

kHz

Shift Clock Frequency

(Notes 8, 9)

l

10

25

50

MHz

Shift Clock Period

40

20

ns

l

10

4

2

μs

Acquisition Time

l

2

1

0.5

μs

Conversion Time

l

8

3

1.5

μs

Minimum Positive CONV Pulse Width

(Note 8)

l

8

3

1.5

μs

SCK↑ Setup Time After CONV↓

(Note 8)

l

16

16

16

ns

SDO Enabled Time After CONV↓

(Notes 8, 9)

l

16

16

16

ns

888

ns

SCK Low Time

(Note 11)

40%

40%

SCK High Time

(Note 11)

40%

40%

SDO Data Valid Hold Time After SCK↓

(Notes 8, 9, 10)

l

444

ns

SDO Into Hi-Z State Time After CONV↑

(Notes 8, 9)

6

6

6

ns

Note 6: Linearity, offset and gain specifications apply for a single-ended

Note 7: Typical RMS noise at code transitions.

Note 8: Guaranteed by characterization. All input signals are specified with

Note 9: All timing specifications given are with a 10pF capacitance load.

With a capacitance load greater than this value, a digital buffer or latch

must be used.

Note 11: Guaranteed by design, not subject to test.

Note 12: High temperatures degrade operating lifetimes. Operating lifetime

is derated at temperatures greater than 105°C.