Electronic Components Datasheet Search |
|
LTC2366CTS8-TRMPBF Datasheet(PDF) 9 Page - Linear Technology |
|
LTC2366CTS8-TRMPBF Datasheet(HTML) 9 Page - Linear Technology |
9 / 24 page LTC2365/LTC2366 9 23656f PIN FUNCTIONS LTC2365/LTC2366 (S6 Package) VDD (Pin 1): Positive Supply. The VDD range is 2.35V to 3.6V. VDD also defines the input span of the ADC, 0V to VDD. Bypass to GND and to a solid ground plane with a 10μF ceramic capacitor (or 10μF tantalum in parallel with 0.1μF ceramic). GND (Pin 2): Ground. The GND pin must be tied directly to a solid ground plane. AIN (Pin 3): Analog Input. AIN is a single-ended input with respect to GND with a range from 0V to VDD. SCK (Pin 4): Shift Clock Input. The SCK serial clock ad- vances the conversion process. SDO data transitions on the falling edge of SCK. SDO (Pin 5): Three-state Serial Data Output. The A/D conversion result is shifted out on SDO as a serial data stream with MSB first. The data stream consists of two leading zeros followed by 12 bits of conversion data and two trailing zeros. CS (Pin 6): Chip Select Input. This active low signal starts a conversion on the falling edge and frames the serial data transfer. LTC2365/LTC2366 (TS8 Package) VDD (Pin 1): Positive Supply. The VDD range is 2.35V to 3.6V. Bypass to GND and to a solid ground plane with a 10μF ceramic capacitor (or 10μF tantalum in parallel with 0.1μF ceramic). VREF (Pin 2): Reference Input. VREF defines the input span of the ADC, 0V to VREF and the VREF range is 1.4V to VDD. Bypass to GND and to a solid ground plane with a 4.7μF ceramic capacitor (or 4.7μF tantalum in parallel with 0.1μF ceramic). GND (Pin 3): Ground. The GND pin must be tied directly to a solid ground plane. AIN (Pin 4): Analog Input. AIN is a single-ended input with respect to GND with a range from 0V to VREF. OVDD (Pin 5): Output Driver Supply for SDO. The OVDD range is 1V to 3.6V. Bypass to GND and to a solid ground plane with a 4.7μF ceramic capacitor (or 4.7μF tantalum in parallel with 0.1μF ceramic). SDO (Pin 6): Three-state Serial Data Output. The A/D conversion result is shifted out on SDO as a serial data stream with MSB first. The data stream consists of two leading zeros followed by 12 bits of conversion data and two trailing zeros. SCK (Pin 7): Shift Clock Input. The SCK serial clock ad- vances the conversion process. SDO data transitions on the falling edge of SCK. CS (Pin 8): Chip Select Input. This active low signal starts a conversion on the falling edge and frames the serial data transfer. |
Similar Part No. - LTC2366CTS8-TRMPBF |
|
Similar Description - LTC2366CTS8-TRMPBF |
|
|
Link URL |
Privacy Policy |
ALLDATASHEET.COM |
Does ALLDATASHEET help your business so far? [ DONATE ] |
About Alldatasheet | Advertisement | Datasheet Upload | Contact us | Privacy Policy | Link Exchange | Manufacturer List All Rights Reserved©Alldatasheet.com |
Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
Family Site : ic2ic.com |
icmetro.com |