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LTC2290CUP Datasheet(PDF) 5 Page - Linear Technology |
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LTC2290CUP Datasheet(HTML) 5 Page - Linear Technology |
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5 / 24 page  LTC2290 5 2290fa SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS fs Sampling Frequency (Note 9) ● 1 10 MHz tL CLK Low Time Duty Cycle Stabilizer Off ● 40 50 500 ns Duty Cycle Stabilizer On (Note 7) ● 5 50 500 ns tH CLK High Time Duty Cycle Stabilizer Off ● 40 50 500 ns Duty Cycle Stabilizer On (Note 7) ● 5 50 500 ns tAP Sample-and-Hold Aperture Delay 0 nS tD CLK to DATA Delay CL = 5pF (Note 7) ● 1.4 2.7 5.4 ns tMD MUX to DATA Delay CL = 5pF (Note 7) ● 1.4 2.7 5.4 ns Data Access Time After OE ↓ CL = 5pF (Note 7) ● 4.3 10 ns BUS Relinquish Time (Note 7) ● 3.3 8.5 ns Pipeline Latency 5 Cycles POWER REQUIRE E TS The ● denotes the specifications which apply over the full operating temperature range, otherwise specifications are at TA = 25°C. (Note 8) TI I G CHARACTERISTICS The ● denotes the specifications which apply over the full operating temperature range, otherwise specifications are at TA = 25°C. (Note 4) Note 1: Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. Exposure to any Absolute Maximum Rating condition for extended periods may affect device reliability and lifetime. Note 2: All voltage values are with respect to ground with GND and OGND wired together (unless otherwise noted). Note 3: When these pin voltages are taken below GND or above VDD, they will be clamped by internal diodes. This product can handle input currents of greater than 100mA below GND or above VDD without latchup. Note 4: VDD = 3V, fSAMPLE = 10MHz, input range = 2VP-P with differential drive, unless otherwise noted. Note 5: Integral nonlinearity is defined as the deviation of a code from a straight line passing through the actual endpoints of the transfer curve. The deviation is measured from the center of the quantization band. Note 6: Offset error is the offset voltage measured from –0.5 LSB when the output code flickers between 0000 0000 0000 and 1111 1111 1111. Note 7: Guaranteed by design, not subject to test. Note 8: VDD = 3V, fSAMPLE = 10MHz, input range = 1VP-P with differential drive. The supply current and power dissipation are the sum total for both channels with both channels active. Note 9: Recommended operating conditions. SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS VDD Analog Supply Voltage (Note 9) ● 2.7 3 3.4 V OVDD Output Supply Voltage (Note 9) ● 0.5 3 3.6 V IVDD Supply Current Both ADCs at fS(MAX) ● 40 46 mA PDISS Power Dissipation Both ADCs at fS(MAX) ● 120 138 mW PSHDN Shutdown Power (Each Channel) SHDN = H, OE = H, No CLK 2 mW PNAP Nap Mode Power (Each Channel) SHDN = H, OE = L, No CLK 15 mW |
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