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LTC1772BIS6 Datasheet(PDF) 10 Page - Linear Technology |
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LTC1772BIS6 Datasheet(HTML) 10 Page - Linear Technology |
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10 / 16 page  LTC1772B 10 1772bfa APPLICATIONS INFORMATION size or height requirements in the design. Due to the high operating frequency of the LTC1772B, ceramic capacitors can also be used for CIN. Always consult the manufacturer if there is any question. The selection of COUT is driven by the required effective series resistance (ESR). Typically, once the ESR require- ment is satisfied, the capacitance is adequate for filtering. The output ripple (ΔVOUT) is approximated by: VOUT IRIPPLE ESR+ 1 4fCOUT where f is the operating frequency, COUT is the output capacitance and IRIPPLE is the ripple current in the induc- tor. The output ripple is highest at maximum input voltage since ΔIL increases with input voltage. Manufacturers such as Nichicon, United Chemicon and Sanyo should be considered for high performance through- hole capacitors. The OS-CON semiconductor dielectric capacitor available from Sanyo has the lowest ESR (size) product of any aluminum electrolytic at a somewhat higher price. Once the ESR requirement for COUT has been met, the RMS current rating generally far exceeds the IRIPPLE(P-P) requirement. Low Supply Operation Although the LTC1772B can function down to approxi- mately 2.0V, the maximum allowable output current is reduced when VIN decreases below 3V. Figure 4 shows the amount of change as the supply is reduced down to 2V. Also shown in Figure 4 is the effect of VIN on VREF as VIN goes below 2.3V. Setting Output Voltage The regulated output voltage is determined by: VOUT = 0.8 1+ R2 R1 For most applications, an 80k resistor is suggested for R1. To prevent stray pickup, locate resistors R1 and R2 close to LTC1772B. Efficiency Considerations The efficiency of a switching regulator is equal to the output power divided by the input power times 100%. It is often useful to analyze individual losses to determine what is limiting the efficiency and which change would produce the most improvement. Efficiency can be expressed as: Efficiency = 100% – (η1 + η2 + η3 + ...) where η1, η2, etc. are the individual losses as a percent- age of input power. Although all dissipative elements in the circuit produce losses, four main sources usually account for most of the losses in LTC1772B circuits: 1) LTC1772B DC bias INPUT VOLTAGE (V) 2.0 105 100 95 90 85 80 75 2.2 2.4 2.6 2.8 1772 F03 3.0 VREF VITH Figure 4. Line Regulation of VREF and VITH Figure 5. Setting Output Voltage 3 VFB VOUT LTC1772B R1 1772 F04 R2 |
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