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LTC6702CTS8-TRMPBF Datasheet(PDF) 8 Page - Linear Technology |
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LTC6702CTS8-TRMPBF Datasheet(HTML) 8 Page - Linear Technology |
8 / 12 page LTC6702 8 6702f APPLICATIONS INFORMATION maintain micropower operation, the output stage uses a break-before-make circuit. The break interval of this circuit turns off both the pull-up and pull-down devices for tens of nanoseconds before activating the appropriate output transistor (depends on the output transition direction). Any load connected to the output will charge or discharge internal capacitance during this interval. This can create a soft corner during output transitions and also decrease the propagation delay. The Typical Performance Characteristics section shows this behavior under three load conditions: unloaded, 10k to ground and 200Ω to ground. Loads to V+ have a similar affect when the output is transitioning from low to high. Power Supplies The comparator circuitry operates from a single 1.7V to 5.5V. A 0.1μF minimum bypass capacitor is required between the V+ pin and GND. When the output is sinking at least 1mA, a 1μF bypass capacitor is recommended. Pulsing the V+ supply to the comparators on and off may engage the ESD protection circuitry at the V+ pin. If this occurs, current is pulled from the V+ pin through the output stage. Using the recommended supply bypass capacitors with some series resistance in the V+ supply line will help to prevent this action in pulsed supply applications. Level Translators The level translators in the Typical Applications section show an adjustable high-precision voltage reference enabling the user to vary the threshold voltage. Simply adjusting the ratio of the two resistors changes the thresh- old voltage according to the following equation: VTHR = 0.4 1+ RF RG Low to High Level Translator TYPICAL APPLICATIONS – + 1/2 LTC6702 2V 0V 0V OUT 6702 TA02 5.5V 5.5V 100k 24.9k LT6650 GND FB OUT IN 500mV 1μF 0.1μF |
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