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LTC6102CDD-TR Datasheet(PDF) 10 Page - Linear Technology

Part # LTC6102CDD-TR
Description  Precision Zero Drift Current Sense Amplifi er
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Manufacturer  LINER [Linear Technology]
Direct Link  http://www.linear.com
Logo LINER - Linear Technology

LTC6102CDD-TR Datasheet(HTML) 10 Page - Linear Technology

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LTC6102/LTC6102HV
10
6102fb
APPLICATIONS INFORMATION
Figure 3. Shunt Diode Limits Maximum Input Voltage to Allow
Better Low Input Resolution Without Overranging
Selection of External Input Resistor, RIN
The external input resistor, RIN, controls the transconduc-
tance of the current sense circuit, IOUT = VSENSE/RIN. For
example, if RIN = 100, then IOUT = VSENSE/100 or IOUT =
1mA for VSENSE = 100mV.
Figure 2. Kelvin Input Connection Preserves Accuracy
with Large Load Current and Large Output Current
LTC6102
ROUT
VOUT
6102 F02
RIN
V+
LOAD
RSENSE
RIN
+
V+
–INF
V
OUT
VREG
0.1μF
TIE AS CLOSE TO RIN AS POSSIBLE
–INS
+IN
LOAD
V+
V
OUTPUT
RSENSE*
ROUT
LTC6102
RIN
RIN
+
CREG
*VISHAY VCS1625 SERIES
WITH 4 PAD KELVIN CONNECTION
V
V+
LOAD
DSENSE
6102 F03
RSENSE
RIN should be chosen to provide the required resolution
while limiting the output current. At low supply voltage,
IOUT may be as much as 1mA. By setting RIN such that
the largest expected sense voltage gives IOUT = 1mA, then
the maximum output dynamic range is available. Output
dynamic range is limited by both the maximum allowed
output current (Note 1) and the maximum allowed output
voltage, as well as the minimum practical output signal. If
less dynamic range is required, then RIN can be increased
accordingly, reducing the output current and power dis-
sipation. If small sense currents must be resolved ac-
curately in a system that has very wide dynamic range, a
smaller RIN may be used if the max current is limited in
another way, such as with a Schottky diode across RSENSE
(Figure 3). This will reduce the high current measurement
accuracy by limiting the result, while increasing the low
current measurement resolution. This approach can be
helpful in cases where occasional large burst currents
may be ignored.
Care should be taken when designing the PC board lay-
out for RIN, especially for small RIN values. All trace and
interconnect impedances will increase the effective RIN
value, causing a gain error. It is important to note that the
large temperature drift of copper resistance will cause a
change in gain over temperature if proper care is not taken
to reduce this effect.
To further limit the effect of trace resistance on gain,
maximizing the accuracy of these circuits, the LTC6102 has
been designed with a Kelvin input. The inverting terminal
(–INS) is separate from the feedback path (–INF). During
operation, these two pins must be connected together.
The design of the LTC6102 is such that current into –INS
is input bias current only, which is typically 60pA at 25°C.
Almost all of the current from RIN flows into –INF, through
the LTC6102, and into ROUT via the OUT pin. In order to
minimize gain error, –INS should be routed in a separate
path from –INF to a point as close to RIN as possible. In
addition, the higher potential terminal of RIN should be
connected directly to the positive terminal of RSENSE (or
any input voltage source). For the highest accuracy, RIN
should be a four-terminal resistor if it is less than 10Ω.
Selection of External Output Resistor, ROUT
The output resistor, ROUT, determines how the output cur-
rent is converted to voltage. VOUT is simply IOUT • ROUT.
In choosing an output resistor, the max output voltage
must first be considered. If the circuit that is driven by the
output does not have a limited input voltage, then ROUT


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