Electronic Components Datasheet Search |
|
LTC6404HUD-1-PBF Datasheet(PDF) 7 Page - Linear Technology |
|
LTC6404HUD-1-PBF Datasheet(HTML) 7 Page - Linear Technology |
7 / 28 page LTC6404 7 6404f Note 1: Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. Exposure to any Absolute Maximum Rating condition for extended periods may affect device reliability and lifetime. Note 2: The inputs IN+, IN– are protected by a pair of back-to-back diodes. If the differential input voltage exceeds 1.4V, the input current should be limited to less than 10mA. Input pins (IN+, IN–, VOCM and SHDN) are also protected by steering diodes to either supply. If the inputs should exceed either supply voltage, the input current should be limited to less than 10mA. Note 3: A heat sink may be required to keep the junction temperature below the absolute maximum rating when the output is shorted indefinitely. Long-term application of output currents in excess of the absolute maximum ratings may impair the life of the device. Note 4: The LTC6404C/LTC6404I are guaranteed functional over the operating temperature range –40°C to 85°C. The LTC6404H is guaranteed functional over the operating temperature range –40°C to 125°C. Note 5: The LTC6404C is guaranteed to meet specified performance from 0°C to 70°C. The LTC6404C is designed, characterized, and expected to meet specified performance from –40°C to 85°C but is not tested or QA sampled at these temperatures. The LTC6404I is guaranteed to meet specified performance from –40°C to 85°C. The LTC6404H is guaranteed to meet specified performance from –40°C to 125°C. Note 6: Input bias current is defined as the average of the input currents flowing into Pin 6 and Pin 15 (IN– and IN+). Input offset current is defined as the difference of the input currents flowing into Pin 15 and Pin 6 (IOS = IB+ – IB–) Note 7: Input common mode range is tested using the test circuit of Figure 1 by measuring the differential gain with a ±1V differential output with VICM = mid-supply, and with VICM at the input common mode range limits listed in the Electrical Characteristics table, verifying the differential gain has not deviated from the mid-supply common mode input case by more than 1%, and the common mode offset (VOSCM) has not deviated from the zero bias common mode offset by more than ±15mV (LTC6404-1), ±20mV (LTC6404-2) or ±40mV (LTC6404-4). The voltage range for the output common mode range is tested using the test circuit of Figure 1 by applying a voltage on the VOCM pin and testing at both mid-supply and at the Electrical Characteristics table limits to verify that the the common mode offset (VOSCM) has not deviated by more than ±15mV (LTC6404-1), ±20mV (LTC6404-2) or ±40mV (LTC6404-4). Note 8: Input CMRR is defined as the ratio of the change in the input common mode voltage at the pins IN+ or IN– to the change in differential input referred voltage offset. Output CMRR is defined as the ratio of the change in the voltage at the VOCM pin to the change in differential input referred voltage offset. These specifications are strongly dependent on feedback ratio matching between the two outputs and their respective inputs, and is difficult to measure actual amplifier performance. (See “The Effects of Resistor Pair Mismatch” in the Applications Information section of this data sheet. For a better indicator of actual amplifier performance independent of feedback component matching, refer to the PSRR specification. Note 9: Differential power supply rejection (PSRR) is defined as the ratio of the change in supply voltage to the change in differential input referred voltage offset. Common mode power supply rejection (PSRRCM) is defined as the ratio of the change in supply voltage to the change in the common mode offset, VOUTCM – VOCM. Note 10: This parameter is pulse tested. Output swings are measured as differences between the output and the respective power supply rail. Note 11: This parameter is pulse tested. Extended operation with the output shorted may cause junction temperatures to exceed the 125°C limit and is not recommended. See Note 3 for more details. Note 12: Since the LTC6404 is a voltage feedback amplifier with low output impedance, a resistive load is not required when driving an ADC. Therefore, typical output power is very small. In order to compare the LTC6404 with amplifiers that require 50 Ω output loads, output swing of the LTC6404 driving an ADC is converted into an “effective” OIP3 as if the LTC6404 were driving a 50Ω load. Note 13: The capacitors used to set the filter pole might have up to ±15% variation. The resistors used to set the filter pole might have up to ±12% variation. ELECTRICAL CHARACTERISTICS |
Similar Part No. - LTC6404HUD-1-PBF |
|
Similar Description - LTC6404HUD-1-PBF |
|
|
Link URL |
Privacy Policy |
ALLDATASHEET.COM |
Does ALLDATASHEET help your business so far? [ DONATE ] |
About Alldatasheet | Advertisement | Datasheet Upload | Contact us | Privacy Policy | Link Exchange | Manufacturer List All Rights Reserved©Alldatasheet.com |
Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
Family Site : ic2ic.com |
icmetro.com |