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LTC4401-2EMS8 Datasheet(PDF) 8 Page - Linear Technology |
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LTC4401-2EMS8 Datasheet(HTML) 8 Page - Linear Technology |
8 / 16 page 8 LTC4401-1/LTC4401-2 4401fa APPLICATIO S I FOR ATIO Enable: When SHDN is asserted high the part will auto- matically calibrate out all offsets. This takes <10 µs and is controlled by an internal delay circuit. After 10 µs VPCA/B will step up to the starting voltage of 450mV. The user can then apply the ramp signal. The user should wait 12 µsafter SHDN has been asserted high before applying the ramp. The DAC should be settled 2 µs after asserting SHDN high. Power Ramp Profiles The external voltage gain associated with the RF channel can vary significantly between RF power amplifier types. The LTC4401-X frequency compensation has been optimized to be stable with several different power ampli- fiers and manufacturers. This frequency compensation generally defines the loop dynamics that impact the power/ time response and possibly (slow loops) the power ramp sidebands. The LTC4401-X operates open loop until an RF voltage appears at the RF pin, at which time the loop closes and the output power follows the DAC profile. The RF power amplifier will require a certain control voltage level (threshold) before an RF output signal is produced. The LTC4401-X VPCA/B output(s) must quickly rise to this threshold voltage in order to meet the power/time profile. To reduce this time, the LTC4401-X starts at 450mV. However, at very low power levels the PCTL input signal is small, and the VPCA/B output may take several microsec- onds to reach the RF power amplifier threshold voltage. To reduce this time, it may be necessary to apply a positive pulse at the start of the ramp to quickly bring the VPCA/B output to the threshold voltage. This can generally be achieved with DAC programming. The magnitude of the pulse is dependent on the RF amplifier characteristics. Power ramp sidebands and power/time are also a factor when ramping to zero power. When the power is ramped down the loop will eventually open at power levels below the LTC4401-X detector threshold. The LTC4401-X will then go open loop and the output voltage at VPCA/B will stop falling. If this voltage is high enough to produce RF output power, the power/time or power ramp sidebands may not meet specification. This problem can be avoided by starting the DAC ramp from 200mV (Figure 1). At the end of the cycle, the DAC can be ramped down to 0mV. This applies a negative signal to the LTC4401-X thereby ensuring that the VPCA/B output will ramp to 0V. The 200mV ramp step must be applied < 2 µs after SHDN is asserted high to allow the autozero to cancel the step. Slow DAC rise times will extend this time by the additional RC time constants which may require that the DAC is enabled and settled prior to SHDN asserted high. LTC4401-X Timing Diagram 10 µs28µs 2 µs 28 µs 543 µs T1 T2 T3 T4 T5 T6 VSTART SHDN VPCA/B PCTL 4400 TA02 T1: LTC4401-X COMES OUT OF SHUTDOWN 12 µs PRIOR TO BURST T2: INTERNAL TIMER COMPLETES AUTOZERO CORRECTION, <10 µs T3: BASEBAND CONTROLLER STARTS RF POWER RAMP UP AT 12 µs AFTER SHDN IS ASSERTED HIGH T4: BASEBAND CONTROLLER COMPLETES RAMP UP T5: BASEBAND CONTROLLER STARTS RF POWER RAMP DOWN AT END OF BURST T6: LTC4401-X RETURNS TO SHUTDOWN MODE BETWEEN BURSTS T7: BSEL CHANGE PRIOR TO SHDN, 0ns TYPICAL (LTC4401-2 ONLY) T8: BSEL CHANGE AFTER TO SHDN, 0ns TYPICAL (LTC4401-2 ONLY) BSEL T7 T8 (LTC4401-2 ONLY) General Layout Considerations The LTC4401-X should be placed near the directional coupler. The feedback signal line to the RF pin should be a 50 Ω transmission line with optional termination or a short line. External Termination The LTC4401-X has an internal 250 Ω termination resistor at the RF pin. If a directional coupler is used, it is recom- mended that an external 68 Ω termination resistor be connected between the RF coupling capacitor (33pF), and ground at the side connected to the directional coupler. Termination components should be placed adjacent to the LTC4401-X. |
Similar Part No. - LTC4401-2EMS8 |
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Similar Description - LTC4401-2EMS8 |
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