3

LTC4301L

4301lfa

The

ELECTRICAL CHARACTERISTICS

Note 1: Stresses beyond those listed under Absolute Maximum Ratings

may cause permanent damage to the device. Exposure to any Absolute

Maximum Rating condition for extended periods may affect device

reliability and lifetime.

Note 2: The connection circuitry always regulates its output to a higher

voltage than its input. The magnitude of this offset voltage as a function of

Characteristics section.

Note 3: Determined by design, not tested in production.

SYMBOL

PARAMETER

CONDITIONS

MIN

TYP

MAX

UNITS

SDAIN, SCLIN Logic Input Threshold Voltage

Rising Edge

0.45

0.6

0.75

V

SDAOUT, SCLOUT Logic Input Threshold Voltage

Rising Edge

1.55

1.8

2.0

V

SDAIN, SCLIN Logic Input Threshold Hysteresis

(Note 3)

85

mV

SDAOUT, SCLOUT Logic Input Threshold Hysteresis

(Note 3)

50

mV

CS Delay On-Off

10

ns

READY Delay Off-On

10

ns

CS Delay Off-On

95

µs

READY Delay On-Off

10

ns

Ready Off Leakage Current

±0.1

µA

Input-Output Connection

Input-Output Offset Voltage

●

0

100

175

mV

SDA or SCL = 0.2V (Note 2)

Digital Input Capacitance SDAIN, SDAOUT,

(Note 3)

10

pF

SCLIN, SCLOUT

Input Leakage Current

SDA, SCL Pins

±5

µA

Output Low Voltage, Input = 0V

SDA, SCL Pins,

●

0

0.4

V

SDA, SCL Pins,

0

0.2

V

Timing Characteristics

(Note 3)

400

600

kHz

Bus Free Time Between Stop and Start

(Note 3)

1.3

µs

Condition

Hold Time After (Repeated) Start Condition

(Note 3)

100

ns

Repeated Start Condition Set-Up Time

(Note 3)

0

ns

Stop Condition Set-Up Time

(Note 3)

0

ns

Data Hold Time Input

(Note 3)

0

ns

Data Set-Up Time

(Note 3)

100

ns