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LT3496EUFD-TRPBF Datasheet(PDF) 4 Page - Linear Technology |
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LT3496EUFD-TRPBF Datasheet(HTML) 4 Page - Linear Technology |
4 / 20 page LT3496 4 3496fe Note 1: Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. Exposure to any Absolute Maximum Rating condition for extended periods may affect device reliability and lifetime. Note 2: The LT3496E is guaranteed to meet performance specifications from 0°C to 125°C junction temperature. Specifications over the –40°C to 125°C operating junction temperature range are assured by design, characterization and correlation with statistical process controls. The LT3496I is guaranteed over the full –40°C to 125°C operating junction temperature range. ELECTRICAL CHARACTERISTICS The l denotes the specifications which apply over the full operating temperature range, otherwise specifications are at TA = 25°C. VIN = 5V, VSHDN = 5V, CAP1-3 = 5V, PWM1-3 = 5V, FADJ = 0.5V, CTRL1-3 = 1.5V, OVP1-3 = 0V, unless otherwise noted. Note 3: Current flows into pin. Current limit and switch VCESAT is guaranteed by design and/or correlation to static test. Note 4: Absolute maximum voltage at the VIN and SHDN pins is 40V for nonrepetitive 1 second transients, and 30V for continuous operation. Note 5: Gate turn-on/turn-off delay is measured from 50% level of PWM voltage to 90% level of gate on/off voltage. PARAMETER CONDITIONS MIN TYP MAX UNITS SHDN Input Low Voltage 0.4 V SHDN Input High Voltage 1.5 V SHDN Pin Current VSHDN = 5V, Current Into Pin 65 100 μA PWM1-3 Input Low Voltage 0.4 V PWM1-3 Input High Voltage 1.2 V PWM1-3 Pin Current Current Into Pin 160 210 μA Gate Off Voltage (CAP1-3–TG1-3) CAP1-3 = 40V, PWM1-3 = 0V 0.1 0.3 V Gate On Voltage (CAP1-3–TG1-3) CAP1-3 = 40V 5.5 6.5 7.5 V Gate Turn-On Delay CLOAD = 300pF, CAP1-3 = 40V (Note 5) 110 ns Gate Turn-Off Delay CLOAD = 300pF, CAP1-3 = 40V (Note 5) 110 ns |
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