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A14V60AA-3BG208C Datasheet(PDF) 10 Page - Actel Corporation |
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A14V60AA-3BG208C Datasheet(HTML) 10 Page - Actel Corporation |
10 / 68 page 1-184 Routed Clocks The routed clock networks are referred to as CLK0 and CLK1. Each network is connected to a clock module (CLKMOD) that selects the source of the clock signal and may be driven as follows (see Figure 6): • externally from the CLKA pad • externally from the CLKB pad • internally from the CLKINA input • internally from the CLKINB input The clock modules are located in the top row of I/O modules. Clock drivers and a dedicated horizontal clock track are located in each horizontal routing channel. The function of the clock module is determined by the selection of clock macros from the macro library. The macro CLKBUF is used to connect one of the two external clock pins to a clock network, and the macro CLKINT is used to connect an internally generated clock signal to a clock network. Since both clock networks are identical, the user does not care whether CLK0 or CLK1 is being used. Routed clocks can also be used to drive high fanout nets like resets, output enables, or data enables. This saves logic modules and results in performance increases in some cases. Routing Structure The ACT 3 architecture uses vertical and horizontal routing tracks to connect the various logic and I/O modules. These routing tracks are metal interconnects that may either be of continuous length or broken into segments. Segments can be joined together at the ends using antifuses to increase their lengths up to the full length of the track. Horizontal Routing Horizontal channels are located between the rows of modules and are composed of several routing tracks. The horizontal routing tracks within the channel are divided into one or more segments. The minimum horizontal segment length is the width of a module-pair, and the maximum horizontal segment length is the full length of the channel. Any segment that spans more than one-third the row length is considered a long horizontal segment. A typical channel is shown in Figure 7. Undedicated horizontal routing tracks are used to route signal nets. Dedicated routing tracks are used for the global clock networks and for power and ground tie-off tracks. Vertical Routing Other tracks run vertically through the modules. Vertical tracks are of three types: input, output, and long. Vertical tracks are also divided into one or more segments. Each segment in an input track is dedicated to the input of a particular module. Each segment in an output track is dedicated to the output of a particular module. Long segments are uncommitted and can be assigned during Figure 5 • Function Diagram for I/O Pad Driver PAD OE SLEW DATAOUT DATAIN IEN INEN OUTEN Figure 6 • Clock Networks CLKB CLKA FROM PADS CLOCK DRIVERS CLKMOD CLKINB CLKINA S0 S1 INTERNAL SIGNAL CLKO(17) CLKO(16) CLKO(15) CLKO(2) CLKO(1) CLOCK TRACKS |
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