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RTAX250-SS624E Datasheet(PDF) 29 Page - Actel Corporation |
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RTAX250-SS624E Datasheet(HTML) 29 Page - Actel Corporation |
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29 / 170 page  RTAX-S/SL RadTolerant FPGAs v5.3 2-11 I/O Specifications Pin Descriptions Supply Pins GND Ground Low supply voltage. VCCA Supply Voltage Supply voltage for array (1.5 V). VCCIBx Supply Voltage Supply voltage for I/Os. Bx is the I/O Bank ID – 0 to 7. See "User I/Os" on page 2-12 for more information. VCCDA Supply Voltage Supply voltage for the I/O differential amplifier and JTAG and probe interfaces. VCCDA is either 3.3 V or 2.5 V and must use 3.3 V when voltage-referenced and/or differential is used. Additionally, VCCDA must be greater than or equal to any VCCI voltages (i.e. VCCDA ≥ VCCIBx). VPUMP Supply Voltage (External Pump) In low-power mode, VPUMP will be used to access an external charge pump (if the user desires to bypass the internal charge pump to further reduce power). The device starts using the external charge pump when the voltage level on VPUMP reaches 3.3 V. 1 In normal device operation, when using the internal charge pump, VPUMP should be tied to GND. User-Defined Supply Pins VREF Supply Voltage Reference voltage for I/O banks. VREF pins are configured by the user from regular I/O pins; VREF are not in fixed locations. There can be one or more VREF pins in an I/O bank. Global Pins HCLKA/B/C/D Dedicated (Hardwired) Clocks A, B, C, and D These pins are the clock input for sequential modules. Input levels are compatible with all supported I/O standards (there is a P/N pin pair for support of differential I/O standards). This input is directly wired to each R-cell and offers clock speeds independent of the number of R-cells being driven. When the HCLK pins are unused, it is recommended that they are tied to the ground. CLKE/F/G/H Global Clocks E, F, G, and H These pins are clock inputs for clock distribution networks. Input levels are compatible with all supported I/O standards (there is a P/N pin pair for support of differential I/O standards). The clock input is buffered prior to clocking the R-cells. When the CLK pins are unused, Actel recommends that they are tied to a known state. 1. When VPUMP = 3.3V, it shuts off the internal charge pump. |
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