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LT8410IDC-1-TRPBF Datasheet(PDF) 10 Page - Linear Technology |
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LT8410IDC-1-TRPBF Datasheet(HTML) 10 Page - Linear Technology |
10 / 16 page LT8410/LT8410-1 10 84101f APPLICATIONS INFORMATION Step 4. Calculate the nominal output current: IOUT(NOM) = IIN(AVG) • VIN • 0.7 VOUT mA Step 5. Derate output current: IOUT = IOUT(NOM) • 0.8 For low output voltages the output current capability will be increased. When using output disconnect (load current taken from VOUT), these higher currents will cause the drop in the PMOS switch to be higher resulting in lower output current capability than predicted by the preceding equations. Inrush Current When VCC is stepped from ground to the operating voltage while the output capacitor is discharged, a high level of inrush current may flow through the inductor and Schottky diode into the output capacitor. Conditions that increase inrush current include a larger more abrupt voltage step at VCC, a larger output capacitor tied to the CAP pin and an inductor with a low saturation current. While the chip is designed to handle such events, the inrush current should not be allowed to exceed 0.3A. For circuits that use output capacitor values within the recommended range and have input voltages of less than 6V, inrush current remains low, posing no hazard to the device. In cases where there are large steps at VCC (more than 6V) and/or a large capacitor is used at the CAP pin, inrush current should be measured to ensure safe operation. Soft-Start The LT8410 series contains a soft-start circuit to limit peak switch currents during start-up. High start-up current is inherent in switching regulators in general since the feedback loop is saturated due to VOUT being far from its final value. The regulator tries to charge the output capacitor as quickly as possible, which results in large peak current. When the FBP pin voltage is generated by a resistor divider from the VREF pin, the start-up current can be limited by connecting an external capacitor (typically 47nF to 220nF) to the VREF pin. When the part is brought out of shutdown, this capacitor is first discharged for about 70μs (providing protection against pin glitches and slow ramping), then an internal 10μA current source pulls the VREF pin slowly to 1.235V. Since the VOUT voltage is set by the FBP pin voltage, the VOUT voltage will also slowly increase to the regulated voltage, which results in lower peak inductor current. The voltage ramp rate on the pin can be set by the value of the VREF pin capacitor. Output Disconnect The LT8410 series has an output disconnect PMOS that blocks the load from the input during shutdown. The maximum current through the PMOS is limited by circuitry inside the chip, helping the chip survive output shorts. SHDN Pin Comparator and Hysteresis Current An internal comparator compares the SHDN pin voltage with an internal voltage reference (1.3V) which gives a precise turn-on voltage level. The internal hysteresis of this turn-on voltage is about 60mV. When the chip is turned on, and the SHDN pin voltage is close to this turn-on voltage, 0.1μA current flows out of the SHDN pin. This current is called SHDN pin hysteresis current, and will go away when the chip is off. By connecting the external resistors as in Figure 2, a user-programmable enable voltage function can be realized. The turn-on voltage for the configuration is: 1.30 • (1 + R1/R2) and the turn-off voltage is: (1.24 – R3 • 10 –7) • (1 + R1/R2) – (R1 • 10–7) where R1, R2 and R3 are resistance value in Ω. R1 ENABLE VOLTAGE R2 R3 CONNECT TO SHDN PIN Figure 2. Programming Enable Voltage by Using External Resistors |
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