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AGL1000V2-FGG144I Datasheet(PDF) 36 Page - Actel Corporation |
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AGL1000V2-FGG144I Datasheet(HTML) 36 Page - Actel Corporation |
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36 / 212 page 
IGLOO DC and Switching Characteristics 2- 22 Advance v0.5 Figure 2-6 • Tristate Output Buffer Timing Model and Delays (example) D CLK Q D CLK Q 10% VCCI tZL Vtrip 50% tHZ 90% VCCI tZH Vtrip 50% 50% tLZ 50% EOUT PAD D E 50% tEOUT (R) 50% tEOUT (F) PAD DOUT EOUT D I/O Interface E tEOUT tZLS Vtrip 50% tZHS Vtrip 50% EOUT PAD D E 50% 50% tEOUT (R) tEOUT (F) 50% VCC VCC VCC VCCI VCC VCC VCC VOH VOL VOL tZL, tZH, tHZ, tLZ, tZLS, tZHS tEOUT = MAX(tEOUT(r), tEOUT(f)) |
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