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AGL1000V2-FGG144I Datasheet(PDF) 23 Page - Actel Corporation |
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AGL1000V2-FGG144I Datasheet(HTML) 23 Page - Actel Corporation |
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IGLOO DC and Switching Characteristics Ad vance v0.5 2-9 Power per I/O Pin Table 2-12 • Summary of I/O Input Buffer Power (per pin) – Default I/O Software Settings Applicable to Advanced I/O Banks VCCI (V) Static Power PDC6 (mW) 1 Dynamic Power PAC9 (µW/MHz) 2 Single-Ended 3.3 V LVTTL / 3.3 V LVCMOS 3.3 – 16.27 2.5 V LVCMOS 2.5 – 4.65 1.8 V LVCMOS 1.8 – 1.61 1.5 V LVCMOS (JESD8-11) 1.5 – 0.96 1.2 V LVCMOS3 1.2 – 0.58 3.3 V PCI 3.3 – 17.67 3.3 V PCI-X 3.3 – 17.67 Differential LVDS 2.5 2.26 0.89 LVPECL 3.3 5.72 1.63 Notes: 1. PDC6 is the static power (where applicable) measured on VCCI. 2. PAC9 is the total dynamic power measured on VCCI. 3. Applicable for IGLOO V2 devices only Table 2-13 • Summary of I/O Input Buffer Power (per pin) – Default I/O Software Settings Applicable to Standard Plus I/O Banks VCCI (V) Static Power PDC6 (mW) 1 Dynamic Power PAC9 (µW/MHz) 2 Single-Ended 3.3 V LVTTL / 3.3 V LVCMOS 3.3 – 16.41 2.5 V LVCMOS 2.5 – 4.75 1.8 V LVCMOS 1.8 – 1.66 1.5 V LVCMOS (JESD8-11) 1.5 – 1.00 1.2 V LVCMOS3 1.2 – 0.61 3.3 V PCI 3.3 – 17.78 3.3 V PCI-X 3.3 – 17.78 Notes: 1. PDC6 is the static power (where applicable) measured on VCCI. 2. PAC9 is the total dynamic power measured on VCCI. 3. Applicable for IGLOO V2 devices only. |
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