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COREU1PHY-AN Datasheet(PDF) 3 Page - Actel Corporation |
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COREU1PHY-AN Datasheet(HTML) 3 Page - Actel Corporation |
3 / 8 page CoreU1PHY – UTOPIA Level 1 PHY Interface v4.0 3 Alternatively, the link-layer device may choose to stall in- between cells without deselecting the physical interface, as illustrated in Figure 4. If the link-layer has another cell to send to the physical interface and if polling during the current cell indicates that the CoreU1PHY is able to accept another cell, the link-layer may send cells back-to-back, as illustrated in Figure 5. RX Interface (Egress) The RX interface operates in a similar manner. The process begins with u1_rx_clav. If the user interface indicates there is at least one complete cell available for transfer by asserting r_avail high, the core responds with u1_rx_clav high; otherwise, u1_rx_clav is asserted low and the link-layer device must wait until the user logic indicates that a cell is available for transfer. To begin receiving cells on the RX interface, the link- layer must select the CoreU1PHY by asserting u1_rx_en low (Figure 6). The CoreU1PHY will then assert u1_rx_soc high, indicating that the first word of the cell transfer is active on the bus. Once a transfer has begun, all 53 or 54 bytes of the cell are transferred without interruption. If polling during the current transfer indicates that there are no more cells available, or if the link-layer is unable to receive another cell from the CoreU1PHY, the link- layer may deselect the physical interface by de-asserting u1_rx_en after receiving the last byte of the current cell, as illustrated in Figure 7. If the link-layer continues to enable the CoreU1PHY during the last two bytes of the current cell transfer, and one or more complete ATM cells are ready to be transferred (u1_rx_avail is high), the CoreU1PHY will send back-to-back cells, as shown in Figure 8. If the user interface indicates r_avail low (no data to send), but the link-layer continues to assert U1_rx_en low, the CoreU1PHY interface will remain idle until r_avail is asserted high on the user interface and another cell transfer begins. Figure 4 • TX Stalled by u1_tx_clav Figure 5 • TX Back-to-Back Transfer Figure 6 • RX Start of Cell Transfer P51 P52 P53 P54 XX H1 H2 u1_tx_clk u1_tx_clav u1_tx_en u1_tx_soc u1_tx_data u1_tx_clk u1_tx_clav u1_tx_en u1_tx_soc u1_tx_data P51 P52 P53 P54 H1 H2 H3 H4 H5 H6 H1 H2 u1_rx_clk u1_rx_clav u1_rx_en u1_rx_soc u1_rx_data Figure 7 • RX End of Transfer Figure 8 • RX Back-to-Back Transfer P51 P52 P53 P54 XX u1_rx_clk u1_rx_clav u1_rx_en u1_rx_soc u1_rx_data P51 P52 P53 P54 H1 H2 H3 H4 H5 u1_rx_clk u1_rx_clav u1_rx_en u1_rx_soc u1_rx_data |
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