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LT3008ITS8-PBF Datasheet(PDF) 7 Page - Linear Technology

Part # LT3008ITS8-PBF
Description  3關A IQ, 20mA, 45V Low Dropout Linear Regulator
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Manufacturer  LINER [Linear Technology]
Direct Link  http://www.linear.com
Logo LINER - Linear Technology

LT3008ITS8-PBF Datasheet(HTML) 7 Page - Linear Technology

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LT3008
7
3008f
PIN FUNCTIONS
SHDN (Pin 1/Pin 5): Shutdown. Pulling the SHDN pin
low puts the LT3008 into a low power state and turns the
output off. If unused, tie the SHDN pin to VIN. The LT3008
does not function if the SHDN pin is not connected. The
SHDN pin cannot be driven below GND unless tied to the
IN pin. If the SHDN pin is driven below GND while IN is
powered, the output will turn on. SHDN pin logic cannot
be referenced to a negative rail.
GND (Pins 2, 3, 4/Pin 6): Ground. Connect the bottom
of the resistor divider that sets output voltage directly to
GND for the best regulation.
IN (Pin 5/Pin 4): Input. The IN pin supplies power to the
device. The LT3008 requires a bypass capacitor at IN if
the device is more than six inches away from the main
input filter capacitor. In general, the output impedance of
a battery rises with frequency, so it is advisable to include
a bypass capacitor in battery-powered circuits. A bypass
capacitor in the range of 0.1μF to 10μF will suffice. The
LT3008 withstands reverse voltages on the IN pin with re-
spect to ground and the OUT pin. In the case of a reversed
input, which occurs with a battery plugged in backwards,
the LT3008 acts as if a blocking diode is in series with its
input. No reverse current flows into the LT3008 and no
reverse voltage appears at the load. The device protects
both itself and the load.
OUT (Pin 6/Pins 2, 3): Output. This pin supplies power
to the load. Use a minimum output capacitor of 2.2μF
to prevent oscillations. Large load transient applications
require larger output capacitors to limit peak voltage
transients. See the Applications Information section for
more information on output capacitance and reverse
output characteristics.
ADJ (Pin 7/Pin 1): Adjust. This pin is the error amplifier’s
inverting terminal. Its 400pA typical input bias current
flows out of the pin (see curve of ADJ Pin Bias Current vs
Temperature in the Typical Performance Characteristics
section). The ADJ pin voltage is 600mV referenced to GND
and the output voltage range is 600mV to 44.5V.
NC (Pin 8, TSOT-23 Package Only): No Connect. Pin 8
is an NC pin in the TSOT-23 package. This pin is not tied
to any internal circuitry. It may be floated, tied to VIN or
tied to GND.
Exposed Pad (Pin 7, DFN Package Only): Ground. The
Exposed Pad (backside) of the DFN package is an electri-
cal connection to GND. To ensure optimum performance,
solder Pin 7 to the PCB and tie directly to Pin 6.
(TSOT-23/DFN)


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