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TC4469EJD Datasheet(PDF) 5 Page - TelCom Semiconductor, Inc |
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TC4469EJD Datasheet(HTML) 5 Page - TelCom Semiconductor, Inc |
5 / 9 page 4-265 TELCOM SEMICONDUCTOR, INC. 7 6 5 4 3 1 2 8 LOGIC-INPUT CMOS QUAD DRIVERS TC4467 TC4468 TC4469 Maximum operating temperature: TJ – θJA (PD) = 141°C, where: TJ = Maximum allowable junction temperature (+150 °C) θJA = Junction-to-ambient thermal resistance (83.3 °C/W) 14-pin plastic package. NOTE: Ambient operating temperature should not exceed +85 °C for "EJD" device or +125 °C for "MJD" device. Figure 1. Switching Time Test Circuit VOUT 1B 1A 2B 2A 3B 3A 4B 4A 1 µF FILM 0.1 µF CERAMIC VDD 470 pF 90% 10% 10% 10% tD1 tR tD2 tF 90% +5V INPUT (A, B) VDD OUTPUT 0V 0V 90% 1 2 3 4 5 6 8 9 7 10 11 12 13 14 Input: 100 kHz, square wave, tRISE = tFALL ≤ 10nsec Transition power dissipation arises in the complementary configuration (TC446X) because the output stage N-channel and P-channel MOS transistors are ON simultaneously for a very short period when the output changes. The transition power dissipation is approximately: PT = f VS (10 10 –9). Package power dissipation is the sum of load, quies- cent and transition power dissipations. An example shows the relative magnitude for each term: C = 1000 pF capacitive load VS = 15V D = 50% f = 200 kHz PD = Package Power Dissipation = PL + PQ + PT = 45 mW + 35 mW + 30 mW = 110 mW. |
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