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IN74LV574 Datasheet(PDF) 4 Page - IK Semicon Co., Ltd |
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IN74LV574 Datasheet(HTML) 4 Page - IK Semicon Co., Ltd |
4 / 8 page IN74LV574 ICC1 Additional supply current per input VI = VCC – 0.6V 2.7 3.6 - 0.2 - 0.2 - 0.5 0.85 mA IOZ Three state leakage current 3-state output VI (11) = VIH VO =VCC or 0 V 5.5 - ±0.5 - ±0.5 - ±5 - ±10 µА AC ELECTRICAL CHARACTERISTICS (CL=50 pF, tr=tf=2.5 ns) Test VCC Guaranteed Limit Symbol Parameter conditions V -40 °C to 25°C 85 °C 125 °C Unit min max min max min max tPHL, tPLH Propagation delay , Clock to Q VI = 0 V or V1 Figures 1,3 1.2 2.0 2.7 3.0 4.5 - - - - - 160 26 20 16 14 - - - - - 170 34 25 20 17 - - - - - 200 43 31 25 21 ns tPHZ, tPLZ Propagation delay, OE to Q VI = 0 V or V1 Figures 2,4 1.2 2.0 2.7 3.0 4.5 - - - - - 160 31 23 20 17 - - - - - 170 39 29 24 20 - - - - - 200 48 36 29 24 ns tPZH, tPZL Propagation delay, OE to Q VI = 0 V or V1 Figures 2,4 1.2 2.0 2.7 3.0 4.5 - - - - - 140 26 20 16 14 - - - - - 160 34 25 20 17 - - - - - 180 43 31 25 21 ns CI Input capacitance 5.5 - 7.0* - - - - pF CPD Power dissipation capacitance (per flip-flop) VI = 0 V or VCC 5.5 - 50* - - - - pF * T = 25oC DEVICE UNDER TEST OUTPUT CL * TEST POINT DEVICE UNDER TEST OUTPUT 1 k CL * TEST POINT Connect to VCC when testing tPLZ and tPZL Connect to GND when testing tPHZ and tPZH * Includes all probe and jig capacitance * Includes all probe and jig capacitance Figure 1. Test Circuit Figure 2. Test Circuit 4 |
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