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EP2C35A15F324C6N Datasheet(PDF) 76 Page - Altera Corporation

Part # EP2C35A15F324C6N
Description  Cyclone II Device Family
Download  168 Pages
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Manufacturer  ALTERA [Altera Corporation]
Direct Link  http://www.altera.com
Logo ALTERA - Altera Corporation

EP2C35A15F324C6N Datasheet(HTML) 76 Page - Altera Corporation

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Altera Corporation
Cyclone II Device Handbook, Volume 1
February 2007
IEEE Std. 1149.1 (JTAG) Boundary Scan Support
Cyclone II devices also use the JTAG port to monitor the logic operation
of the device with the SignalTap® II embedded logic analyzer. Cyclone II
devices support the JTAG instructions shown in Table 3–1.
Table 3–1. Cyclone II JTAG Instructions (Part 1 of 2)
JTAG Instruction
Instruction Code
Description
SAMPLE/PRELOAD
00 0000 0101
Allows a snapshot of signals at the device pins to be captured and
examined during normal device operation, and permits an initial
data pattern to be output at the device pins. Also used by the
SignalTap II embedded logic analyzer.
EXTEST (1)
00 0000 1111
Allows the external circuitry and board-level interconnects to be
tested by forcing a test pattern at the output pins and capturing test
results at the input pins.
BYPASS
11 1111 1111
Places the 1-bit bypass register between the
TDI and TDO pins,
which allows the BST data to pass synchronously through selected
devices to adjacent devices during normal device operation.
USERCODE
00 0000 0111
Selects the 32-bit
USERCODE register and places it between the
TDI and TDO pins, allowing the USERCODE to be serially shifted
out of
TDO.
IDCODE
00 0000 0110
Selects the
IDCODE register and places it between TDI and TDO,
allowing the
IDCODE to be serially shifted out of TDO.
HIGHZ (1)
00 0000 1011
Places the 1-bit bypass register between the
TDI and TDO pins,
which allows the BST data to pass synchronously through selected
devices to adjacent devices during normal device operation, while
tri-stating all of the I/O pins.
CLAMP (1)
00 0000 1010
Places the 1-bit bypass register between the
TDI and TDO pins,
which allows the BST data to pass synchronously through selected
devices to adjacent devices during normal device operation while
holding I/O pins to a state defined by the data in the boundary-scan
register.
ICR
instructions
Used when configuring a Cyclone II device via the JTAG port with
a USB Blaster, ByteBlasterII, MasterBlasteror
ByteBlasterMVdownload cable, or when using a Jam File or JBC
File via an embedded processor.
PULSE_NCONFIG
00 0000 0001
Emulates pulsing the
nCONFIG pin low to trigger reconfiguration
even though the physical pin is unaffected.


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