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LT1639IN Datasheet(PDF) 10 Page - Linear Technology |
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LT1639IN Datasheet(HTML) 10 Page - Linear Technology |
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10 / 16 page  10 LT1638/LT1639 16389fd APPLICATIONS INFORMATION Supply Voltage The positive supply pin of the LT1638/LT1639 should be bypassed with a small capacitor (typically 0.1 μF) within an inch of the pin. When driving heavy loads an additional 4.7 μF electrolytic capacitor should be used. When using split supplies, the same is true for the negative supply pin. The LT1638/LT1639 are protected against reverse battery voltages up to 18V. In the event a reverse battery condition occurs, the supply current is less than 1nA. The LT1638/LT1639 can be shut down by removing V+. In this condition the input bias current is less than 0.1nA, even if the inputs are 44V above the negative supply. At temperatures greater than 70 °C, when operating the LT1638/LT1639 on total supplies of 10V or more, the supply must not be brought up faster than 1V/ μs. Increas- ing the bypass capacitor and/or adding a small resistor in series with the supply will limit the rise time. Inputs The LT1638/LT1639 have two input stages, NPN and PNP (see the Simplified Schematic), resulting in three distinct operating regions as shown in the Input Bias Current vs Common Mode typical performance curve. For input voltages about 0.8V or more below V +, the PNP input stage is active and the input bias current is typically – 20nA. When the input common mode voltage is within 0.5V of the positive rail, the NPN stage is operating and the input bias current is typically 40nA. Increases in tempera- ture will cause the voltage at which operation switches from the PNP input stage to the NPN input stage to move towards V+. The input offset voltage of the NPN stage is untrimmed and is typically 600 μV. A Schottky diode in the collector of each NPN transistor allow the LT1638/LT1639 to operate over the top, with either or both of its inputs above V+. At about 0.3V above V+ the NPN input transistor is fully saturated and the input bias current is typically 8 μA at room temperature. The input offset voltage is typically 2mV when operating above V+. The LT1638/LT1639 will operate with its inputs 44V above V – regardless of V+. The inputs are protected against excursions of 2V below V – by an internal 1k resistor in series with each input and a diode from the input to the negative supply. If the inputs can go more than 2V below V –, an additional external resistor is required. A 10k resistor will protect the input against excursions as much as 10V below V –. The input stage of the LT1638/LT1639 incorporates phase reversal protection to prevent the output from phase reversing for inputs below V –. There are no clamping diodes between the inputs and the maximum differential input voltage is 44V. Output The output of the LT1638/LT1639 can swing within 20mV of the positive rail with no load, and within 3mV of the negative rail with no load. When monitoring voltages within 20mV of the positive rail or within 3mV of the negative rail, gain should be taken to keep the output from clipping. The LT1638/LT1639 are capable of sinking and sourcing over 40mA on ±15V supplies; sourcing current capability is reduced to 20mA at 5V total supplies as noted in the electrical characteristics. The LT1638/LT1639 are internally compensated to drive at least 200pF of capacitance under any output loading conditions. A 0.22 μF capacitor in series with a 150Ω resistor between the output and ground will compensate these amplifiers for larger capacitive loads, up to 1000pF, at all output currents. Optional Output Compensation for Capacitive Loads Greater than 200pF – + LT1638 VIN 1000pF 0.22 μF 150 Ω Distortion There are two main contributors of distortion in op amps: output crossover distortion as the output transitions from sourcing to sinking current and distortion caused by |
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