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LT1614 Datasheet(PDF) 6 Page - Linear Technology |
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LT1614 Datasheet(HTML) 6 Page - Linear Technology |
6 / 16 page 6 LT1614 The LT1614 combines a current mode, fixed frequency PWM architecture with a –1.23V reference to directly regulate negative outputs. Operation can be best under- stood by referring to the block diagram of Figure 2. Q1 and Q2 form a bandgap reference core whose loop is closed around the output of the converter. The driven reference point is the lower end of resistor R4, which normally sits at a voltage of –1.23V. As the load current changes, the NFB pin voltage also changes slightly, driving the output of gm amplifier A1. Switch current is regulated directly on a cycle-to-cycle basis by A1’s output. The flip-flop is set at the beginning of each cycle, turning on the switch. When the summation of a signal representing switch current and a ramp generator (introduced to avoid subharmonic oscil- lations at duty factors greater than 50%) exceeds the VC signal, comparator A2 changes stage, resetting the flip- flop and turning off the switch. Output voltage decreases (the magnitude increases) as switch current is increased. The output, attenuated by external resistor divider R1 and R2, appears at the NFB pin, closing the overall loop. Frequency compensation is provided externally by a series RC connected from the VC pin to ground. Typical values are 100k and 1nF. Transient response can be tailored by adjustment of these values. As load current is decreased, the switch turns on for a shorter period each cycle. If the load current is further decreased, the converter will skip cycles to maintain output voltage regulation. OPERATIO The LT1614 can work in either of two topologies. The simpler topology appends a capacitive level shift to a boost converter, generating a negative output voltage, which is directly regulated. The circuit schematic is de- tailed in Figure 3. Only one inductor is required, and the two diodes can be in a single SOT-23 package. Output noise is the same as in a boost converter, because current is delivered to the output only during the time when the LT1614’s internal switch is on. If D2 is replaced by an inductor, as shown in Figure 4, a higher performance solution results. This converter topol- ogy was developed by Professor S. Cuk of the California Institute of Technology in the 1970s. A low ripple voltage results with this topology due to inductor L2 in series with the output. Abrupt changes in output capacitor current are eliminated because the output inductor delivers current to the output during both the off-time and the on-time of the LT1614 switch. With proper layout and high quality output capacitors, output ripple can be as low as 1mVP–P. The operation of Cuk’s topology is shown in Figures 5 and 6. During the first switching phase, the LT1614’s switch, represented by Q1, is on. There are two current loops in operation. The first loop begins at input capacitor C1, flows through L1, Q1 and back to C1. The second loop flows from output capacitor C3, through L2, C2, Q1 and back to C3. The output current from RLOAD is supplied by L2 and C3. The voltage at node SW is VCESAT and at node SWX the voltage is –(VIN + |VOUT|). Q1 must conduct both L1 and L2 current. C2 functions as a voltage level shifter, with an approximately constant voltage of (VIN + |VOUT|) across it. VIN VIN –VOUT 1614 F03 SW L1 D1 D2 GND LT1614 C1 C3 C2 1 µF R2 10k 10Ok 1nF R1 NFB SHDN VC SHUTDOWN + VIN VIN –VOUT 1614 F04 SW L1 L2 D1 GND LT1614 C1 C3 C2 1 µF R2 10k R1 NFB + 10Ok 1nF SHDN SHUTDOWN VC Figure 3. Direct Regulation of Negative Output Using Boost Converter with Charge Pump Figure 4. L2 Replaces D2 to Make Low Output Ripple Inverting Topology. Coupled or Uncoupled Inductors Can Be Used. Follow Phasing If Coupled for Best Results |
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