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F72814 Datasheet(PDF) 7 Page - Feature Integration Technology Inc. |
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F72814 Datasheet(HTML) 7 Page - Feature Integration Technology Inc. |
7 / 16 page F72814 V0.23P -4- F72814 PARAMETER SYMBOL TEST CONDITIONS MIN. TYP. MAX. UNIT Dead time TDT 2V to 2V, Loading =2A 10 100 ns REFERENCE VOLTAGE Reference voltage VREF VCC=5V, T= 25 0.784 0.8 0.816 V PWM CONTROLLER GATE DRIVERS Upper Drive Source RUGATE VDS = 1V, VGS = 12V, 5 10 Ω Upper Drive Sink RUGATE VDS = 1V, VGS = 12V 4 8 Ω Lower Drive Source RLGATE VDS = 1V, VGS = 12V 4 8 Ω Lower Drive Sink RLGATE VDS = 1V, VGS = 12V 3 5 Ω Error Amplifier ※ E/A Transconductance gm 1.67 u A/V ※ DC Gain A0 85 * dB ※ : Design Guarantee 6. Block Diagram Control Logic Power On Reset Bias & Regulator (VDD & V3VAA) Comp GM UVP 300KHz Tri-OSC Reference Voltage 0.6V 0.8V FB OCSET VDDA PHASE UGATE LGATE BOOT VDDA GND 0.4V 40uA UV OC V3VAA Comp 1.5V VDD 0.15V SD PH_M Comp Comp Figure 1 : Block Diagram |
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