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LT1160IS Datasheet(PDF) 8 Page - Linear Integrated Systems |
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LT1160IS Datasheet(HTML) 8 Page - Linear Integrated Systems |
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8 / 16 page  8 LT1160/LT1162 11602fb TI I G DIAGRA OPERATIO (Refer to Functional Diagram) The LT1160 (or 1/2 LT1162) incorporates two indepen- dent driver channels with separate inputs and outputs. The inputs are TTL/CMOS compatible; they can withstand input voltages as high as V+. The 1.4V input threshold is regulated and has 300mV of hysteresis. Both channels are noninverting drivers. The internal logic prevents both outputs from simultaneously turning on under any input conditions. When both inputs are high both outputs are actively held low. The floating supply for the top driver is provided by a bootstrap capacitor between the Boost pin and the Top Source pin. This capacitor is recharged each time the negative plate goes low in PWM operation. The undervoltage detection circuit disables both channels when V+ is below the undervoltage trip point. A separate UV detect block disables the high side channel when VBOOST – VTSOURCE is below its own undervoltage trip point. The top and bottom gate drivers in the LT1160 each utilize two gate connections: 1) a gate drive pin, which provides the turn on and turn off currents through an optional series gate resistor, and 2) a gate feedback pin which connects directly to the gate to monitor the gate-to-source voltage. Whenever there is an input transition to command the outputs to change states, the LT1160 follows a logical sequence to turn off one MOSFET and turn on the other. First, turn-off is initiated, then VGS is monitored until it has decreased below the turn-off threshold, and finally the other gate is turned on. 10V 2V IN TOP IN BOTTOM TOP GATE DRIVER BOTTOM GATE DRIVER 2V 0.8V 2V 0.8V 12V 0V 12V 0V tr tD1 tD3 10V 2V tr tD2 tD4 tf tD3 tD2 tf tD4 1160/62 TD tD1 |
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