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SN75DP128ARTQT Datasheet(PDF) 6 Page - Texas Instruments |
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SN75DP128ARTQT Datasheet(HTML) 6 Page - Texas Instruments |
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6 / 26 page  DEVICE POWER ELECTRICAL CHARACTERISTICS HOT PLUG AND CABLE ADAPTER DETECT ELECTRICAL CHARACTERISTICS SWITCHING CHARACTERISTICS SN75DP128A SLLS940 – NOVEMBER 2008............................................................................................................................................................................................ www.ti.com RECOMMENDED OPERATING CONDITIONS (continued) MIN NOM MAX UNIT VI Input voltage 0 3.6 V dR Data rate 1 MHz HPD, CAD, AND CONTROL PINS VIH High-level input voltage 2 5.25 V VIL Low-level input voltage 0 0.8 V The SN75DP128A is designed to operate off a single 5V supply. over recommended operating conditions (unless otherwise noted) PARAMETER TEST CONDITIONS MIN TYP MAX UNIT LP = 5V, VDD *1 = V DD ML: VID = 600 mV, 2.7 Gbps PRBS IDD Supply current 60 65 mA AUX: VID = 500 mV, 1 Mbps PRBS HPD/CAD A and B = 5 V IDD *1 Supply current VDD *1 = 5.25 V 0.1 4 mA ISD Shutdown current LP = 0 V 1 16 µA The SN75DP128A is designed to support the switching of the Hot Plug Detect and Cable adapter Detect signals. The SN75DP128A has a built in level shifter for the HPD and CAD outputs. The output voltage level of the HPD and CAD pins is defined by the voltage level of the VDD *1 pin. Explanation of HPD and the internal logic of the SN75DP128A is located in the application section at the end of the data sheet. over recommended operating conditions (unless otherwise noted) PARAMETER TEST CONDITIONS MIN TYP MAX UNIT VOH5 High-level output voltage IOH = –100 µA, VDD *1 = 5 V 4.5 5 V VOH3.3 High-level output voltage IOH = –100 µA, VDD *1 = 3.3 V 3 3.3 V VOH2.5 High-level output voltage IOH = –100 µA, VDD *1 = 2.5 V 2.25 2.5 V VOH1.8 High-level output voltage IOH = –100 µA, VDD *1 = 1.8 V 1.62 1.8 V VOL Low-level output voltage IOH = 100 µA 0 0.4 V IH High-level input current VIH = 2.0 V, VDD = 5.25 V –10 10 µA IL Low-level input current VIL = 0.8 V, VDD = 5.25 V –10 10 µA over recommended operating conditions (unless otherwise noted) PARAMETER TEST CONDITIONS MIN TYP MAX UNIT tPD(CAD) Propagation delay VDD *1 = 5 V 5 30 ns tPD(HPD) Propagation delay VDD *1 = 5 V 30 110 ns tT1(HPD) HPD logic switch pause time VDD *1 = 5 V 2 4.7 ms tT2(HPD) HPD logic switch time VDD *1 = 5 V 170 400 ms tM(HPD) Minimum output pulse duration VDD *1 = 5 V 100 ns tZ(HPD) Low Power to High-level propagation delay VDD *1 = 5 V 30 50 110 ns 6 Submit Documentation Feedback Copyright © 2008, Texas Instruments Incorporated Product Folder Link(s): SN75DP128A |
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