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ATR4256-TKSY Datasheet(PDF) 4 Page - ATMEL Corporation |
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ATR4256-TKSY Datasheet(HTML) 4 Page - ATMEL Corporation |
4 / 21 page 4 4867D–AUDR–01/08 ATR4256 4. Input/Output Interface Circuits 4.1 PDO (Pin 1) PDO is the buffer amplifier output of the PLL. The bipolar output stage is a rail-to-rail amplifier. 4.2 PD (Pin 2) PD is the current charge pump output of the PLL. The current can be controlled by setting the appropriate bits. The loop filter has to be designed corresponding to the chosen pump current and the internal reference frequency. A recommendation can be found in the application circuit. The charge-pump current can be chosen by setting Bit 71 and B it 70 as follows: Figure 4-1. Internal Components at PDO Connection Table 4-1. Current Charge-pump Output IPD (µA) B71 B70 25 0 0 100 0 1 500 1 0 2000 1 1 PD VS PDO VS VS |
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