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ACS8514 Datasheet(PDF) 5 Page - Semtech Corporation

Part No. ACS8514
Description  Synchronous Equipment Timing Source Partner IC for 2nd T4 DPLL, Accurate Monitoring & Input Extender
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Maker  SEMTECH [Semtech Corporation]
Homepage  http://www.semtech.com
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ACS8514 Datasheet(HTML) 5 Page - Semtech Corporation

 
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Revision 3.00 April 2007 © Semtech Corp.
Page 5
www.semtech.com
ACS8514 SETS Buddy
ADVANCED COMMS & SENSING
FINAL
DATASHEET
Table 4 Other Pins
Pin Number
Symbol
I/O
Type
Description
2
TRST
I
TTL D
JTAG Control Reset Input: TRST = 1 to enable JTAG Boundary Scan
mode. TRST = 0 for Boundary Scan stand-by mode, still allowing
correct device operation. If not used connect to GND or leave floating.
7
TMS
I
TTL U
JTAG Test Mode Select: Boundary Scan enable. Sampled on rising
edge of TCK. If not used connect to VDD or leave floating.
8
INTREQ
O
TTL/CMOS
Interrupt Request: Active high/low software Interrupt output.
9
TCK
I
TTL D
JTAG Clock: Boundary Scan clock input. If not used connect to GND or
leave floating.
10
REFCLK
I
TTL
Reference Clock: 12.8 MHz (refer to section headed Local Oscillator
Clock).
21
TDO
O
TTL/CMOS
JTAG Output: Serial test data output. Updated on falling edge of TCK.
If not used leave floating.
23
TDI
I
TTL U
JTAG Input: Serial test data Input. Sampled on rising edge of TCK. If
not used connect to VDD or leave floating.
24
I1
I
AMI
Input reference 1: Composite clock 64 kHz + 8 kHz.
25
I2
I
AMI
Input reference 2: Composite clock 64 kHz + 8 kHz.
27
TO2NEG
O
AMI
Output reference 8: Composite clock, 64 kHz + 8 kHz negative pulse.
28
TO2POS
O
AMI
Output reference 8: Composite clock, 64 kHz + 8 kHz positive pulse.
40,
41
I5POS,
I5NEG
I
LVDS/PECL
Input reference 5: Programmable, default 19.44 MHz, default type
LVDS.
42,
43
I6POS,
I6NEG
I
PECL/LVDS
Input reference 6: Programmable, default 19.44 MHz, default type
PECL.
46
I3
I
TTL D
Input reference 3: Programmable, default 8 kHz.
47
I4
I
TTL D
Input reference 4: Programmable, default 8 kHz.
48
I7
I
TTL D
Input reference 7: Programmable, default 19.44 MHz.
51
I8
I
TTL D
Input reference 8: Programmable, default 19.44 MHz.
52
I9
I
TTL D
Input reference 9: Programmable, default 19.44 MHz.
53
I10
I
TTL D
Input reference 10: Programmable, default 19.44 MHz.
54
I11
I
TTL D
Input reference 11: Programmable, default (Master mode)
1.544/2.048 MHz, default (Slave mode) 6.48 MHz.
55
I12
I
TTL D
Input reference 12: Programmable, default 1.544/2.048 MHz.
56
I13
I
TTL D
Input reference 13: Programmable, default 1.544/2.048 MHz.
57
I14
I
TTL D
Input reference 14: Programmable, default 1.544/2.048 MHz.
58 - 60
UPSEL(2:0)
I
TTL D
Microprocessor select: Configures the interface for a particular
microprocessor type at reset.
63 - 69
A(6:0)
I
TTL D
Microprocessor Interface Address: Address bus for the
microprocessor interface registers. A(0) is SDI in Serial mode - output
in EPROM mode only.


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