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AT40KAL040KW1M-E Datasheet(PDF) 4 Page - ATMEL Corporation |
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AT40KAL040KW1M-E Datasheet(HTML) 4 Page - ATMEL Corporation |
4 / 38 page 4 AT40KAL 4263B–AERO–06/03 The Symmetrical Array At the heart of the Atmel architecture is a symmetrical array of identical cells (Figure 1). The array is continuous from one edge to the other, except for bus repeaters spaced every four cells (Figure 2 on page 5). At the intersection of each repeater row and col- umn is a 32 x 4 RAM block accessible by adjacent buses. The RAM can be configured as either a single-ported or dual-ported RAM(1), with either synchronous or asynchro- nous operation. Note: 1. The right-most column can only be used as single-port RAM. Figure 1. Symmetrical Array Surrounded by I/O (AT40K20) Note: AT40KAL has registered I/Os. Group enable every sector for tri-states on obuf’s. = I/O Pad = AT40K Cell = Repeater Row = Repeater Column = FreeRAM |
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