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SN65HVD09 Datasheet(PDF) 2 Page - Texas Instruments |
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SN65HVD09 Datasheet(HTML) 2 Page - Texas Instruments |
2 / 25 page SN65HVD09 SLLS941 – DECEMBER 2008............................................................................................................................................................................................ www.ti.com These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam during storage or handling to prevent electrostatic damage to the MOS gates. PIN FUNCTIONS PIN LOGIC I/O TERMINATION DESCRIPTION LEVEL NAME NO. 4,6,8,10, 1A to 9A 19,21,23, TTL I/O Pullup 1A to 9A carry data to and from the communication controller. 25,27 29,31,33, 35,37,.46 1B– to 9B– RS-485 I/O Pulldown 1B– to 9B– are the inverted data signals of the balanced pair to/from the bus. , 48,50,52 30,32,34, 1B+ to 9B+ 36,38,47, RS-485 I/O Pullup 1B+ to 9B+ are the noninverted data signals of the balanced pair to/from the bus. 49,51,53 BSR is the bit significant response. BSR disables receivers 1 through 8 and enables BSR 2 TTL Input Pullup wired-OR drivers when BSR and DE/RE and CDE1 or CDE2 are high. Channel 9 is placed in a high-impedance state with BSR high. CDE0 is the common driver enable 0. Its input signal enables all drivers when CDE0 and CDE0 54 TTL Input Pulldown 1DE/RE – 9DE/RE are high. CDE1 is the common driver enable 1. Its input signal enables drivers 1 to 4 when CDE1 is CDE1 55 TTL Input Pulldown high and BSR is low. CDE2 is the common driver enable 2. When CDE2 is high and BSR is low, drivers 5 to 8 CDE2 56 TTL Input Pulldown are enabled. CRE 3 TTL Input Pullup CRE is the common receiver enable. When high, CRE disables receiver channels 5 to 9. 5,7,9,11, 1DE/RE–9DE/RE are direction controls that transmit data to the bus when it and CDE0 1DE/RE to 20,22,24, TTL Input Pullup are high. Data is received from the bus when 1DE/RE–9DE/RE and CRE and BSR are 9DE/RE 26,28 low and CDE1 and CDE2 are low. 1,13,14, 15,16,17, GND is the circuit ground. All GND terminals except terminal 1 are physically tied to the GND NA Power NA 40,41,42, die pad for improved thermal conductivity.(1) 43,44 12,18,39, VCC NA Power NA Supply voltage 45 (1) Terminal 1 must be connected to signal ground for proper operation. 2 Submit Documentation Feedback Copyright © 2008, Texas Instruments Incorporated Product Folder Link(s) :SN65HVD09 |
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