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VIPER20B Datasheet(PDF) 14 Page - STMicroelectronics |
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VIPER20B Datasheet(HTML) 14 Page - STMicroelectronics |
14 / 17 page ![]() schematic to be adapted depending the specific needs. If the proposed schematic is used, the pulse duration must be kept at a low value (500ns is sufficient) for minimizing consumption. The optocoupler must be able to provide 20mA through the optotransistor. PRIMARY PEAK CURRENT LIMITATION The primary IDPEAK current and, as resulting effect, the output power can be limited using the simple circuit shown in figure 18. The circuit based on Q1, R1 and R2 clamps the voltage on the COMP pin in order to limit the primary peak current of the device to a value: IDPEAK = VCOMP − 0.5 HID where: VCOMP = 0.6 x R1 + R2 R2 The suggested value for R1+R2 is in the range of 220K Ω. OVER-TEMPERATURE PROTECTION: Over-temperature protection is based on chip temperature sensing. The minimum junction temperature at which over-temperature cut-out occurs is 140 oC while the typical value is 160oC. The device is automatically restarted when the junction temperature decreases to the restart temperature threshold that is typically 34 oC below the shutdown value (see figure 6). Figure 16: Slope Compensation - + 13V OSC COMP SOURCE DRAIN VDD VIPer R1 R2 Q1 C2 C1 R3 FC00462 C3 - + 13V OSC COMP SOURCE DRAIN VDD VIPer R1 C1 F C00452 C2 Figure 15: Typical Compensation Network - + 13V OSC COMP SOURCE DRAIN VDD VIPer 10 k Ω FC00 472 Figure 17:External Clock Synchronization Figure 18:Current Limitation Circuit Example - + 13V OSC COMP SOURCE DRAIN VDD VIPer R1 R2 Q1 FC 00 482 VIPer20B / VIPer20BSP 14/17 |