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VIPER100B Datasheet(PDF) 15 Page - STMicroelectronics

Part # VIPER100B
Description  SMPS PRIMARY I.C.
Download  20 Pages
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Manufacturer  STMICROELECTRONICS [STMicroelectronics]
Direct Link  http://www.st.com
Logo STMICROELECTRONICS - STMicroelectronics

VIPER100B Datasheet(HTML) 15 Page - STMicroelectronics

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frequency source. Figure 20 shows one possible
schematic to be adapted depending the specific
needs. If the proposed schematic is used, the
pulse duration must be kept at a low value (500ns
is sufficient) for minimizing consumption. The
optocoupler must be able to provide 20mA
through the optotransistor.
PRIMARY PEAK CURRENT LIMITATION
The primary IDPEAK current and, as resulting
effect, the output power can be limited using the
simple circuit shown in figure 21. The circuit
based on Q1, R1 and R2 clamps the voltage on
the COMP pin in order to limit the primary peak
current of the device to a value:
IDPEAK
=
VCOMP
− 0.5
HID
where:
VCOMP
= 0.6 x
R1
+ R2
R2
The suggested value for R1+R2 is in the range of
220K
Ω.
OVER-TEMPERATURE PROTECTION:
Over-temperature protection is based on chip
temperature sensing. The minimum junction
temperature at which over-temperature cut-out
occurs is 140
oC while the typical value is 170oC.
The device is automatically restarted when the
junction temperature decreases to the restart
temperature threshold that is typically 40
oC below
Figure 19: Slope Compensation
-
+
13V
OSC
COMP SOURCE
DRAIN
VDD
VIPer100B
R1
R2
Q1
C2
C1
R3
FC0 0141B
C3
-
+
13V
OSC
COMP
SOURCE
DRAIN
VDD
VIPer100B
R1
C1
FC00121B
C2
Figure 18: Typical Compensation Network
-
+
13V
OSC
COMP SOURCE
DRAIN
VDD
VIPer100B
10 k
Ω
FC00220B
Figure 20:External Clock Synchronization
Figure 21:Current Limitation Circuit Example
-
+
13V
OSC
COMP SOURCE
DRAIN
VDD
VIPer10 0B
R1
R2
Q1
FC0 0240B
VIPER100B/BSP
15/20


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