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ML2726DH-T Datasheet(PDF) 7 Page - SIRENZA MICRODEVICES |
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ML2726DH-T Datasheet(HTML) 7 Page - SIRENZA MICRODEVICES |
7 / 25 page ML2726 PRELIMINARY DATASHEET OCT 2007 EDS-105982 REV P01 7 PIN DESCRIPTIONS PIN SIGNAL NAME I/O FUNCTION DIAGRAM POWER & GROUND 8 VSS GND Digital Ground. Ground for digital I/O circuits and control logic. N/A 10 RVPLL PWR PLL Supply. DC power supply decoupling point for the PLL dividers, phase detector, and charge pump. This pin is connected to the output of the regulator and to the PLL supplies. There must be a 220nF capacitor to ground from this pin to decouple (bypass) noise and to stabilize the regulator. See Pin 11 below. 12 GNDPLL GND Ground for the PLL dividers, phase detector, and charge pump. N/A 13 VVREG PWR DC Power Supply Input to the VCO voltage regulator. Must be connected to RVQMIF (pin 27) or RVDMD (pin 29) via decoupling network. N/A 14 RVVCO PWR DC power supply decoupling point for the VCO. Connected to the output of the VCO regulator. A 220nF capacitor must be tied between this pin and ground to decouple (bypass) noise and to stabilize the regulator. N/A 16 GND GND DC ground for VCO and LO circuits. N/A 18 GNDRF GND Ground return for the Receive RF input and Transmit RF output. (PIN 24) (PIN 8) VSS GNDRF RXI VCCA 0.7V VCCA VSS 4k 17 18 8 24 19 GNDRXMX GND Signal ground for the Receive mixers. N/A 20 GNDRXMX2 GND Signal ground for the Receive mixers. N/A |
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Similar Description - ML2726DH-T |
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