Features

– 123 Powerful Instructions – Most Single Clock Cycle Execution

– 32 x 8 General Purpose Working Registers

– Fully Static Operation

– 4K/8K Bytes of In-System Self-Programmable Flash program memory(ATtiny48/88)

– 64/64 Bytes EEPROM (ATtiny48/88)

– 256/512 Bytes Internal SRAM (ATtiny48/88)

– Write/Erase Cycles: 10,000 Flash/100,000 EEPROM

– Data retention: 20 years at 85

°C / 100 years at 25°C

– Optional Boot Code Section with Indepentent Lock Bits

• In-System Programming by On-chip Boot Program

• True Read-While-Write Operation

– Programming Lock for Software Security

– One 8-bit Timer/Counter with Separate Prescaler and Compare Mode

– One 16-bit Timer/Counter with Prescaler, and Compare and Capture Modes

– 8-channel 10-bit ADC in 32-lead TQFP and 32-pad QFN/MLF package

– 6-channel 10-bit ADC in 28-pin PDIP and 28-pad QFN/MLF package

– Master/Slave SPI Serial Interface

– Programmable Watchdog Timer with Separate On-chip Oscillator

– On-chip Analog Comparator

– Interrupt and Wake-up on Pin Change

– debugWIRE On-chip Debug System

– In-System Programmable via SPI Port

– Power-on Reset and Programmable Brown-out Detection

– Internal Calibrated Oscillator

– External and Internal Interrupt Sources

– Three Sleep Modes: Idle, ADC Noise Reduction and Power-down

– 28 Programmable I/O Lines in 32-lead TQFP and 32-pad QFN/MLF package

– 24 Programmable I/O Lines in 28-pin PDIP and 28-pad QFN/MLF package

– 28-pin PDIP, 32-lead TQFP, 28-pad QFN/MLF and 32-pad QFN/MLF

–1.8

–-40

–0

–0

–0

– Active Mode: 1 MHz, 1.8V: 240µA

– Power-down Mode: 0.1µA at 1.8V

8-bit

Microcontroller

with 4/8K Bytes

In-System

Programmable

Flash

ATtiny48/88

Preliminary

Summary

Rev. 8008BS–AVR–06/08