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CS4970X4 Datasheet(PDF) 35 Page - Cirrus Logic

Part No. CS4970X4
Description  32-bit High Definition Audio Decoder DSP Family
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Maker  CIRRUS [Cirrus Logic]
Homepage  http://www.cirrus.com
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CS4970X4 Datasheet(HTML) 35 Page - Cirrus Logic

 
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DS752PP7
Copyright 2008 Cirrus Logic
35
CS4970x4 Data Sheet
32-bit High Definition Audio Decoder DSP Family
10. Revision History
Revision
Date
Changes
A1
FEB 2007
Advance Release.
PP1
MAY 2007
Removed Advanced Product watermark, corrected logo, and added “Pre-
liminary Product Information” on first page and modified legal information
to reflect Preliminary Product status.
PP2
JULY 2007
Added notice about status of DTS-HD license on page 1 and 7.
PP3
OCT 2007
Updated the Tspidsu, Tspickl, and Tspickh timing parameters for master
mode SPI. This applies to both SPI ports. Removed DTS-HD license notice
inserted in version PP2. The license for the DTS-HD decoder is now in
place.Updated Pin Assignments in 144-Pin LQFP Pin-Out Diagram,
removing EE_CS from Pin 7 and adding EE_CS to Pin 25.
PP4
December 20, 2007
Updated DAO timing specifications and timing diagrams. Changed product
naming conventions in Table 4 and Table 5. Changed references to
CS4970x4 Hardware User’s Manual to CS4970x4 System Designer’s
Guide. Changed references to CS4970x4 Firmware User’s Manual to
CS4970x4 System Designer’s Guide
PP5
May 28, 2008
Added 128-Pin LQFP Pin-Out and Package drawings. Changed part num-
bering in Section 6.and Section 7. Added device and firmware selection
guide in Table 2.
PP6
August 4, 2008
Added typical crystal frequency values in Table Footnote 1 and the Max
and Min values of Fxtal in Section 5.7. Removed DSD Phase Modulation
Mode from Section 5.17. Removed reference to MCLK in Section 5.17.
Redefined Master mode clock speed for SCP_CLK in Section 5.10.. Rede-
fined DC leakage characterization data in Section 5.3, correcting units of
measurement. Modified Footnote 1 under Section 5.9. Changed product
family numbering from CS497xx to CS4970x4. Corrected product listings in
table under Section 5.8 “Switching Characteristics — Internal Clock” on
page 13.
PP7
September 30, 2008
Removed references to External Parallel Flash / SRAM Interface.


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